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Software Application Development Access upper 16 MB of QSPI Flash
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Access upper 16 MB of QSPI Flash

Former Member
Former Member over 12 years ago

The Zynq QSPI controller only supports 24-bit addressing (16 MB).  The Zedboard Hardware User Guide indicates the full 256 Mb capacity can be accessed via internal bank switching.

Does anybody know how to do this from Linux?  Is it possible to set up MTDs for both the lower and upper address ranges?

Thanks!

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  • Former Member
    0 Former Member over 12 years ago

    Thanks for the info Max.  Sounds like you guys are definitely working the issue.

    We have a Zynq Z-7045 design in the works.  The PL configuration file alone is over 12 MB, so there's no way that'll fit in 16 MB address space along the Linux image/ramdisk.  I'm trying to avoid using up the MIO pins for QSPI_1 just to gain the additional 16 MB for QSPI boot.

    The approach I'm trying to go with is boot into Linux using the lower 16 MB, and then switch to the upper 16 MB, read the configuration file and then configure the FPGA with xdevcfg.

    I'm hoping you guys and Xilinx can work out this issue so that Linux MTD is supported.  Thanks!

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  • Former Member
    0 Former Member over 12 years ago

    Thanks for the info Max.  Sounds like you guys are definitely working the issue.

    We have a Zynq Z-7045 design in the works.  The PL configuration file alone is over 12 MB, so there's no way that'll fit in 16 MB address space along the Linux image/ramdisk.  I'm trying to avoid using up the MIO pins for QSPI_1 just to gain the additional 16 MB for QSPI boot.

    The approach I'm trying to go with is boot into Linux using the lower 16 MB, and then switch to the upper 16 MB, read the configuration file and then configure the FPGA with xdevcfg.

    I'm hoping you guys and Xilinx can work out this issue so that Linux MTD is supported.  Thanks!

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