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PL Software Reset

Former Member

Hi all,

I have noticed that every time I run my application from SDK, the PL part is still with the state from the previous run. Is there anyway that I can force a programmatic software reset from my app code?

I checked on the Zynq technical reference manual, and I found that a System Software Reset is achieved by asserting "PSS_RST_CTRL[SOFT_RST]" but it isn't very clear how to do this (at least for me). I would expect an API in the BSP in order  to do this.

Just in case, as per automatic configuration, I have a Processor System Reset IP as part of my PL design.

Any help would be greatly appreciated,

Victor.

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    You can generate a System Software Reset by writing a '1' to the PSS_RST_CTRL register as detailed in Appendix B of the Zynq Technical Reference Manual. However, as also described in section 26.3 (Reset Effects) of the TRM, that will reset the PL (Programmable Logic) section and require that you re-program the PL.

     

    If you require a method to initialize your PL under application software control, without reloading the bit file, you will need to explicitly design that function into your programmable logic design.

     

    -Gary

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    You can generate a System Software Reset by writing a '1' to the PSS_RST_CTRL register as detailed in Appendix B of the Zynq Technical Reference Manual. However, as also described in section 26.3 (Reset Effects) of the TRM, that will reset the PL (Programmable Logic) section and require that you re-program the PL.

     

    If you require a method to initialize your PL under application software control, without reloading the bit file, you will need to explicitly design that function into your programmable logic design.

     

    -Gary

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