element14 Community
element14 Community
    Register Log In
  • Site
  • Search
  • Log In Register
  • About Us
  • Community Hub
    Community Hub
    • What's New on element14
    • Feedback and Support
    • Benefits of Membership
    • Personal Blogs
    • Members Area
    • Achievement Levels
  • Learn
    Learn
    • Ask an Expert
    • eBooks
    • element14 presents
    • Learning Center
    • Tech Spotlight
    • STEM Academy
    • Webinars, Training and Events
    • Learning Groups
  • Technologies
    Technologies
    • 3D Printing
    • FPGA
    • Industrial Automation
    • Internet of Things
    • Power & Energy
    • Sensors
    • Technology Groups
  • Challenges & Projects
    Challenges & Projects
    • Design Challenges
    • element14 presents Projects
    • Project14
    • Arduino Projects
    • Raspberry Pi Projects
    • Project Groups
  • Products
    Products
    • Arduino
    • Avnet Boards Community
    • Dev Tools
    • Manufacturers
    • Multicomp Pro
    • Product Groups
    • Raspberry Pi
    • RoadTests & Reviews
  • Store
    Store
    • Visit Your Store
    • Choose another store...
      • Europe
      •  Austria (German)
      •  Belgium (Dutch, French)
      •  Bulgaria (Bulgarian)
      •  Czech Republic (Czech)
      •  Denmark (Danish)
      •  Estonia (Estonian)
      •  Finland (Finnish)
      •  France (French)
      •  Germany (German)
      •  Hungary (Hungarian)
      •  Ireland
      •  Israel
      •  Italy (Italian)
      •  Latvia (Latvian)
      •  
      •  Lithuania (Lithuanian)
      •  Netherlands (Dutch)
      •  Norway (Norwegian)
      •  Poland (Polish)
      •  Portugal (Portuguese)
      •  Romania (Romanian)
      •  Russia (Russian)
      •  Slovakia (Slovak)
      •  Slovenia (Slovenian)
      •  Spain (Spanish)
      •  Sweden (Swedish)
      •  Switzerland(German, French)
      •  Turkey (Turkish)
      •  United Kingdom
      • Asia Pacific
      •  Australia
      •  China
      •  Hong Kong
      •  India
      •  Korea (Korean)
      •  Malaysia
      •  New Zealand
      •  Philippines
      •  Singapore
      •  Taiwan
      •  Thailand (Thai)
      • Americas
      •  Brazil (Portuguese)
      •  Canada
      •  Mexico (Spanish)
      •  United States
      Can't find the country/region you're looking for? Visit our export site or find a local distributor.
  • Translate
  • Profile
  • Settings
Avnet Boards Forums
  • Products
  • Dev Tools
  • Avnet Boards Community
  • Avnet Boards Forums
  • More
  • Cancel
Avnet Boards Forums
Using Xilinx Tools Forum Timing/physical constraints
  • Forum
  • Documents
  • Members
  • Mentions
  • Sub-Groups
  • Tags
  • More
  • Cancel
  • New
Join Avnet Boards Forums to participate - click to join for free!
Actions
  • Share
  • More
  • Cancel
Forum Thread Details
  • State Verified Answer
  • Replies 4 replies
  • Subscribers 336 subscribers
  • Views 586 views
  • Users 0 members are here
Related

Timing/physical constraints

Former Member
Former Member over 10 years ago

Hi,

Can the microZed constraints file be found somewhere?
I'm looking for the timing constraints.

Does anyone know where to find them?

-cja

  • Sign in to reply
  • Cancel
  • drozwood90
    0 drozwood90 over 10 years ago

    Hi,
    The only provided file is a pin map XDC.  The timing constraints are provided by the user once you decide what clocks you are using.
    If you want to see the constraints that the design is using (Vivado will assume some things based on clocks), you can use the write_xdc command:
    write_xdc c:/my_output_test.xdc

    In there, you will get a compiled list of all the constraints the current project is using.  Remember, in XDC if there is a conflict, the last constraint is the one that is implemented.

    --Dan

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Verify Answer
    • Cancel
  • Former Member
    0 Former Member over 8 years ago in reply to drozwood90

    As a follow up to this.

    To create accurate constraints, one must know the time delay of signals traveling to/from the FPGA chip to the external devices (chips) that you are interfacing to. As engineers, we are responsible for the delay from the BERG connector to the external chip. However I need to know the delays from the FPGA chip to the BERG connectors in order to complete the constraints.

    Can you point me to a table of delay times for each of the IO signals?

    Cheers,

    David

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Verify Answer
    • Cancel
  • jafoste4
    0 jafoste4 over 8 years ago

    Hi David,

    You can generate those yourself using Vivado. Please refer to this post and modify it for the package you are using.

    http://zedboard.org/content/picozed-7020-package-flight-times

    --Josh

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Verify Answer
    • Cancel
  • drozwood90
    0 drozwood90 over 8 years ago

    Hi there,

    You can find the trace length report here:
    http://picozed.org/support/documentation/4736
    Search: "net length"

    Using that, you can calculate the delay times for your circuit.  Remember that we do not have a time-table, as the tolerance and specific constraints you write will be based on what you are doing with the signals you are using.  Knowing the net lengths will allow you to add in the internal delays (as Josh mentioned, come from Vivado), plus add in any delays with your Carrier Card, to finally come up with your constraint.

    UG612 might be of some help to you.
    https://www.xilinx.com/itp/xilinx10/books/docs/timing_constraints_ug/timing_constraints_ug.pdf

    --Dan

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Reject Answer
    • Cancel
element14 Community

element14 is the first online community specifically for engineers. Connect with your peers and get expert answers to your questions.

  • Members
  • Learn
  • Technologies
  • Challenges & Projects
  • Products
  • Store
  • About Us
  • Feedback & Support
  • FAQs
  • Terms of Use
  • Privacy Policy
  • Legal and Copyright Notices
  • Sitemap
  • Cookies

An Avnet Company © 2025 Premier Farnell Limited. All Rights Reserved.

Premier Farnell Ltd, registered in England and Wales (no 00876412), registered office: Farnell House, Forge Lane, Leeds LS12 2NE.

ICP 备案号 10220084.

Follow element14

  • X
  • Facebook
  • linkedin
  • YouTube