Hello all,
I have built a PL in Vivado HLS which takes input X -1D array from BRAM (dual port where one port is connected to PL and second port to PS via AXI BRAM Controller) copies into output Y-1D array and stores into BRAM2(dual port where one port is connected to PL and second port to PS via AXI BRAM Controller).
The problem is PL is not reading from BRAM properly as the output array goes to all zeroes after the core is done.
I forced a constant value into Y in my HLS code and tried running on Hardware, It is working fine.
This means that write from PL to BRAM and read as well as write between BRAM and PS is working fine.
The data flow is as follow:
ZynqDDR(writes input vector X to BRAM) -->BRAM1---> PL--->BRAM2( Y written into it by PL)--->ZynqDDR
I have written application in SDK and viewing my output on TeraTerm.
Vivado HLS version:2014.2
Vivado version:2014.2
Can anyone explain the reason to why read from BRAM to PL is not working properly? What is that I have missed?
Kindly Help.
Thanks in advance.
