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Using Xilinx Tools Forum AXI CDMA Connection
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AXI CDMA Connection

Former Member
Former Member over 12 years ago

Hi all, I am following Xilinx's CTT guide Chapter 6, Integrating AXI CDMA with Zynq PS HP Slave Port.  The guide is for the zc702, however, and I'm running into issues.  The bare metal test program fails every time I try to run it.  I think the issue has something to do with the guide being for the zc702.  Does anyone know what changes I would need to make to get this thing up and running? 

Here's the CTT, for reference (starting on page 51): http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/ug873-zynq-ctt.pdf

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  • Former Member
    0 Former Member over 12 years ago

    Hi there,

    I was actually experiencing a very similar problem myself, and my solution was to make the address ranges for the HP0 and HP2 ports fit into the allowed ranges for the zedboard. The guide is written for a board with 1GB of memory while the zedboard has only 512MB, so I made HP0 have the range: 0x10000000 to 0x17ffffff and HP2 have the range: 0x18000000 to 0x1fffffff.

    One other thing: I have not yet been able to get the tutorial to work when all the peripherals from Digilent's reference linux design are also connected, for some reason the interrupt handler never gets called, but with a clean design starting from scratch, the design and the cdma_app.c test program work exactly as intended.

    I hope this helps.

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  • Former Member
    0 Former Member over 11 years ago

    Hello copelandc,
    I am working on the same (Xilinx's CTT guide Chapter 6). I am aware of the smaler DDR RAM of the ZED board and chose the address range as you proposed. Still I cannot find the addresses as I expected in the xparams.h file, or the like.

    static u32 SourceAddr t= XPAR_PS7_DDR_0_S_AXI_HP0_BASEADDR;
    static u32 DestAddr t= XPAR_PS7_DDR_0_S_AXI_HP2_BASEADDR;

    Any idea what might be wrong? I did not meet any errors until I included the cdma_app.c file and the base addresses could not be found.

    Thanks

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  • mitsoras
    0 mitsoras over 8 years ago

    I figured out the solution for application of UG1165 on zedboard:

    1. In vivado-> address editor, go to axi_cdma_0 and set offset address 0x1000_0000 and 0x1800_0000 for HP0, HP2 correspondingly. Range is 128M because of the board's limited RAM.

    2. Continue as instructed by the UG, and in SDK, set the following:

    static u32 SourceAddr     = XPAR_PS7_DDR_0_S_AXI_BASEADDR+0x10000000;
    static u32 DestAddr     = XPAR_PS7_DDR_0_S_AXI_BASEADDR+0x18000000;

    The reason for the problem is that XPAR_PS7_DDR_0_S_AXI_HP0_BASEADDR and XPAR_PS7_DDR_0_S_AXI_HP2_BASEADDR are not defined in xparameters file.

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