www.avnet.com/.../microzed-board-family
I have designed using Tutorial 09 PL I2C PMOD from this link. www.avnet.com/.../microzed-board-family I have used constraint with this tutorial in vitis 2022.2. I have synthesized design and I have got design timing summary attached in capture and capture1. Can anyone explain, why they have created clock in constraint? and How to select input delay and output delay? I have attached tutorial pdf and constraints file for microzed 7010.
