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Release of the VE2302 Development Kit and VE2302 SOM - Technical Documents

iksevas

Brand new forum covering the release of the VE2302 Development Kit and the Versal AI Edge VE2302 SOM by Avnet / Tria-Technologies. Please ask any questions you have here when you get the chance!

Available documents are at the product page websites:

http://avnet.me/ve2302-dk

http://avnet.me/ve2302-som

Documentation that is currently publicly available is at TECHNICAL DOCUMENTS tab on those web pages. Scroll / navigate around and you should find them.

There is a BDF (board definition file) posted to the Avnet Github: Avnet/bdf: Avnet Board Definition Files

There are also a couple of repositories covering the VE2302 OOB for HW and PETALINUX in the Avnet GITHUB. This design is used for the Getting Started Guide. 

More reference designs will begin to be posted to the sites / repos as they become available.

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  • in reply to smsommer

    Thanks for responding.  I installed your board files and created a Vivado project based on DK carrier platform.  Vivado is now happy.  Jtag sees ve2302 ok.  But to go next step such as bringing up MRMAC, I need to know what clocks, pin positions, DDR components, GPIOs, it is importamt to have schematics in hand to assign ios and probe.  I do not have your reference build.

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  • in reply to jhou

    All information you seek is available in User Guide.

    Using reference carrier card, MRMAC would probably need to target HSIO expansion interface I believe as other interfaces targeting the GTs map to the HDMI and SFPs.

    Unfortunately, schematics are only available when you are working through Avnet related sales/field engineering team.

    We will be posting a master constraint file which will have interfaces separated and IO associated from the SOM connectors to the available carrier card peripherals.