What a about a PS application which only configures the Marvell's PHY IC. After then by using Zynqgeek's bypassing the 12 MIO pins to EMIO and PL part. And using our custom IP for our application.
PS: When asking this question i don't have knowledge about the below question: - When our custom IP is doing its job, is there are function of the MDIO and MDC pins for PHY IC?
Sorry for this question. But we have time line and want to get ethernet camera's image information and add some simple additions to the image and show this image on a DMA or HDMI screen. So, we don't have time to learn PS part's coding. If simply configuring the PHY can solve our needs, then we thought that we can use ZB's PHY interface with PL side IP's.
You know "fpgadeveloper.com" like cards offers PL side solutions. If ZB can meet our requirements we won't think about adding extra HWs.
What a about a PS application which only configures the Marvell's PHY IC. After then by using Zynqgeek's bypassing the 12 MIO pins to EMIO and PL part. And using our custom IP for our application.
PS: When asking this question i don't have knowledge about the below question: - When our custom IP is doing its job, is there are function of the MDIO and MDC pins for PHY IC?
Sorry for this question. But we have time line and want to get ethernet camera's image information and add some simple additions to the image and show this image on a DMA or HDMI screen. So, we don't have time to learn PS part's coding. If simply configuring the PHY can solve our needs, then we thought that we can use ZB's PHY interface with PL side IP's.
You know "fpgadeveloper.com" like cards offers PL side solutions. If ZB can meet our requirements we won't think about adding extra HWs.
