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ZedBoard Hardware Design ZedBoard DDR3 interface address space?
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ZedBoard DDR3 interface address space?

Former Member
Former Member over 12 years ago

Hi,
According to ZedBoard user guide, The multi-protocol DDR memory controller is configured for 32-bit wide accesses to a 512 MB address space.

But I was wondering, how would I be able to target only ONE of the Micron MT41K128M16HA-15E components?

In other words, for my specific application, I have two VDMAs that are streaming to DDR. But I would prefer to know that the data from one VDMA is streamed into only one of the Micron memory components, and my data from the second VDMA targets ONLY the second memory component!!

Thanks in advance,
--Rudy


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  • bhfletcher
    0 bhfletcher over 12 years ago

    I don't think it is possible to do what you want. There is only one memory controller inside the Zynq, and it shares the address control signals between the two chips.

     

    It is possible to do byte writes. You could try writing exclusively bytes 0 and 1 for one set of data and bytes 2 and 3 for the other set. That would segregate the data between the two chips, but that seems really confusing to me.

     

    Bryan

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  • bhfletcher
    0 bhfletcher over 12 years ago

    I don't think it is possible to do what you want. There is only one memory controller inside the Zynq, and it shares the address control signals between the two chips.

     

    It is possible to do byte writes. You could try writing exclusively bytes 0 and 1 for one set of data and bytes 2 and 3 for the other set. That would segregate the data between the two chips, but that seems really confusing to me.

     

    Bryan

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