DDR Pins

Hi All,

I'm using Zed Board for my development activities. I'm using MIS/MIG for generating DDR3 SDRAM Controller. In the IO Planning Option while using Fixed Pin Out, I'm not able to specify the pin number / IO location as per schematic. Kindly do advice me on this issue.

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0 Former Member over 13 years ago

MIS/MIG DDR3 generate netlist for programmable logic are. So this core can only use pins that are dedicated to PL.

Processor System 7 should contain nessesary DDR3 controller that can use current DDR3 implementation.
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0 Former Member over 13 years ago

MIS/MIG DDR3 generate netlist for programmable logic are. So this core can only use pins that are dedicated to PL.

Processor System 7 should contain nessesary DDR3 controller that can use current DDR3 implementation.
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