Help:how can I design PTP funcation in PS ethernet0 with zedboard

Recently,I have been asked to design PTP clock synchronization on zedboard,but I try to search example,it seems to be there is no project about it.All I can refer to are the TRM in UG585 and the Open Source Linux Ethernet Performance.I'm a student and start to learn Zynq7000 series ,thus I don't konw how to design it and what can I set about to do? Can anyone help me,Thanks a lot!

0 Former Member over 9 years ago

You might take a look at the example code for ieee 1588 in the SDK for the ps7_ethernet_0 device. Once you have exported your Vivado hardware design to the SDK and implemented a BSP you can open up the System.mss file. Click on"Import Examples" next to the ps7_ethernet_0 under "Peripheral Drivers" and you should see a xemacps_ieee_example to import.

You can also access the example code by looking in your SDK installation directory, something like this:
<Install> /SDK/2014.4/data/embeddedsw/XilinxProcessorIPLib/drivers/emacps_v2_2/examples

-Gary
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0 Former Member over 9 years ago in reply to Former Member

thanks a lot,but now I build the kernel image with the linux-digilent source file,following the step introduced by wiki official website:make arch=arm digilent_zed_defconfig and make arch=arm,however the PS eth0 doesn't work,in addition,the device tree used by the kernel in fault.
how can I modify or config where to make it work well? Can anyone help me?
Thanks a lot.
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0 Former Member over 9 years ago in reply to Former Member

As discussed in your other post Avnet does not provide any support for Digilent Embedded Linux. The Digilent distribution is intended only for students. Please contact your professor or Digilent support at support@digilentinc.com

Please refer to https://github.com/Xilinx for ZedBoard Linux.

-Gary
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