Create UART0 to PMOD (Rx, Tx)

Hi everyone,
My problem is that I want create a serial interface with the Zedboard (Rev C).
I tried to find a tutorial, which helps to contact.
I work with XPS and I clicked under "System Assembly View" to I/O Peripherals and selected UART0 and MIO 10,11 (Is this realy a Pin or only an address?). I saw in an other tutorial where someone add an enet0. There was the next step to switch to the tab "Ports" and select to "make Ports external" but I have there no options.

What do I wrong? What is the next step? Can I write in system.ucf easily which PMOD Pin I want? For example:

net uart0_rx_pin LOC = Y11 | IOSTANDARD = LVCMOS33; # JA1
net uart0_tx_pin LOC = AA11 | IOSTANDARD = LVCMOS33; # JA2
(Must I write something to activate VCC and GND? Probably not, isn't it?)
I think, the next step will be to generate the NetList and the Bitstream and to export the hardware design to sdk.

There I read something about by the #define of the pins. Where I find this adresses?

Thanks for help.

0 Former Member over 10 years ago

There are Zedboard based tutorials for both the Vivado and ISE/PlanAhead tools available here: http://zedboard.org/support/design/1521/11

There are more in depth Speedway workshops that target the ZedBoard here: http://zedboard.org/support/trainings-and-videos

If you choose to work with the Vivado tool suite there are also good blog and tutorial links:

http://www.fpgadeveloper.com/category/tutorials
http://svenand.blogdrive.com/archive/160.html#.VRle9I54o8k
http://zedboard.org/content/microzed-chronicles-free-e-book-released

I would recommend using the Vivado tools if possible as the ISE/PlanAhead tools are dated and all new material will target the Vivado suite.

To answer your question, the MIO 10,11 pins you have selected are fixed signals routed to the JE1 PS PMOD port and, if you used the Zynq Board definition when you started your project, do not need additional constraints. If you select 'EMIO' as an option then you would need to add ports and set the constraints to route the signals to the desired PL PMOD pins. You do not need to 'activate' VCC or GND.

-Gary
Cancel
Vote Up 0 Vote Down

Sign in to reply

Verify Answer

Cancel
0 Former Member over 10 years ago

Hi,
Thanks for the fast answer.
I found a good tutorial for Vivado. Problem is, the program don't know the zedboard...

But i found that way a good tutorial in vivado, which helps more to understand how I can realise the Uart0 to Pins.
here the link:
http://blog.idv-tech.com/2014/03/22/howto-export-zynq-peripheralsi2c-spi-uart-and-etc-to-pmod-connectors-of-zedboard-using-vivado-2013-4/

And if you want do this in XPS:
Easy select what you want in "System Assembly View" to I/O Peripherals and go to the Tab Ports.
There is under processing_system7_0 :
(IO_IF) UART0 a free space => right_click and click on "make external".
So you have a TX and a RX. But you don't know where they come out.
Now you must look in the "Platform"-window and open the data/system.ucf file.

there you must paste where you want TX and RX, but with the right name which you have generated before. In my case, it looks so for RX:
net processing_system7_0_UART0_RX_pin LOC = Y11 | IOSTANDARD = LVCMOS33; # JA1

Next you can generate the Netlist and after this the bitstream.
I don't know if this was all for the moment. I will test it and correct it if something is wrong.
I hope, this helps some people and save some time.

Thanks again Gary!
Cancel
Vote Up 0 Vote Down

Sign in to reply

Verify Answer

Cancel