Hi people, I have a big question. Is it possible to use an external clock signal in the ZedBoard PL part? Thanks for your help!!!
Hi people, I have a big question. Is it possible to use an external clock signal in the ZedBoard PL part? Thanks for your help!!!
Hello everyone
I want to receive clock from FMC_CLK0_P / FMC-CLK0_N and FMC_CLK1_P / FMC-CLK1_N of 7z020 for my mezzanine card.
Can anyone explain how is it possible.
thanks in advance
Sana
As discussed in your other post, you will need to look at the documentation for the ZC702 board to determine the pin assignments and constraints needed to match the Xilinx ZC702 board.
As discussed in your other post, you will need to look at the documentation for the ZC702 board to determine the pin assignments and constraints needed to match the Xilinx ZC702 board.
The Xilinx ZC702 board is supported on the Xilinx community forums: http://forums.xilinx.com/ but here are a couple of places to start:
http://www.xilinx.com/support/documentation/boards_and_kits/zc702_zvik/ug850-zc702-eval-bd.pdf
http://www.xilinx.com/support/index.html/content/xilinx/en/supportNav/boards_and_kits/zynq-7000_soc_boards_and_kits/zynq-7000_soc_zc702_evaluation_kit.html
-Gary
The Xilinx ZC702 board is supported on the Xilinx community forums: http://forums.xilinx.com/ but here are a couple of places to start:
http://www.xilinx.com/support/documentation/boards_and_kits/zc702_zvik/ug850-zc702-eval-bd.pdf
http://www.xilinx.com/support/index.html/content/xilinx/en/supportNav/boards_and_kits/zynq-7000_soc_boards_and_kits/zynq-7000_soc_zc702_evaluation_kit.html
-Gary