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HDMI display controler

Former Member

Hi everybody,

I'm lost with vivado versions, i have done the tutto of " diplay controler HDMI" on version 2014.1 i have got my color bars in my monitor via HDMI till now all it's good.
But when i got copy this project to another machine version 2015.3, i have upgrade all ips after synthetising, implementation and bitstream.

I have run my software in SDK as i have done in version 2014.1. But the prob i cannot see the color bars.
My monitor does'nt recongnize the HDMI :(.

My question is : does someone know the reason why i cannot see the same results ??
Do I need to change something to make my porject 2015.3 works as 2014.1 ?.

Thank your for your feedbacks.

Kind regards

  • 0

    Hi there,

    Is it this design:
    ZedBoard HDMI VIPP, Vivado 2014.1

    from this page:
    http://zedboard.org/support/design/1521/11

    that you are working with?  If so, you jumped a LOT of versions.  I would suggest you stay with 2014.1 until you learn more about the design.  There are some changes that occured with the built in Video IP between 2014 and 2015.  For instance there are a few clocks that were changed around or removed.

    Things like that could be plaguing your design.  If you really need to move forward with 2015, you will need to investigate which IPs are causing your issues.  Again, I would start by investigating the clocks as that is one thing that I am aware was changed between 2014 and 2015 versions of Vivado.

    --Dan

  • 0

    Hi Dan,

    Thank you for your feedback, yes it is Zedboard HDMI VIPP, vivado 2014.1, I tried to adapted with my project because me I m working on a image sensor so I am trying to drive the image via FMC connector.
    Because I don't have much experience on vivado I had chosen 2015.3 arbitrary without any reason.
    Now i will stay on vivado 2014.1 and I will try to add a video frame buffer in order to read the data from the image sensor then monitor it on a screen with the use of the block on zedboard hdmi VIPP.

    I hope that it will work.
    Kind regards.

    Anisse BELMAJY

  • 0

    Has anyone upgraded the TCL files for this reference design to work on Vivado 2016.3 version?

  • 0
     
      
       
        
         

    Hello Aynilian,

         

    We have not. My ssuggestion would be to revert to Vivado 2014.4

         

    --Josh

        
       
      
     
       
  • 0
    Vivado 2016.3
    the HDMI reference design is running the VDMA engine and the Video stream comes all the way to the Video-Stream to Video converter IP block. The problem is VTC, the video timing generator is not generating the v-sync and h-sync. I'm looking into the VTC control register setup now to see if the generator is enabled and detector is disabled. So far it is. The VTC control Register 0 (XVTC_CTL) is configured as: 0x03f73f06. I don't know why the h-sync and v-sync are not being generated. Any ideas?
  • 0

    The HDMI reference design is routed with Vivado 2016.3. As far as I can see on the ILA. I have the v_sync, h_sync and video data outputs out of the video stream to video output block, but one issue is that the signals I'm observing on the ILA are not coming out of the FPGA. Mainly out of the OBUFT drivers. I checked the 3-State enable on the OBUFT and it is low, which is correct for active low. I checked the constraints and the hdmio_hsync is on V17, and hdmio_io_vsynci s on W17 I/O pads, which is what it supposed to be on the Zedboard Rev D2. Any suggestions on why the hdmio signals are not being driven out of the FPGA?