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GPIO/CAN Pins on ZedBoard

Former Member

Please forgive me if this question has already been answered elsewhere.  I have a ZedBoard on which I am developing, and I require integration with a CAN bus.  The ZedBoard does not appear to break out the CAN bus.

I have, however, seen several posts on this forum about operating the CAN bus on a ZedBoard.  Some people seem to have been operating CAN over GPIO pins.

Are there any exposed CAN pins?  Are there any exposed GPIO pins that can be used to implement CAN over GPIO?

Thanks

  • 0

    There are two ways to 'expose' the CAN bus signals from either of the Zynq CAN controllers. Once you enable one of the CAN controllers in the Zynq PS (Processing System) you can select the I/O to be connected to a selection of specific MIO pins or connect the CAN I/O to EMIO into the Zynq PL (Programmable Logic) section and then onto PL I/O pins.

     

    Several pairs of allowable MIO signals for either of the CAN controllers are connected to the JE PMOD connector on the ZedBoard.

     

    -Gary

  • 0 in reply to Former Member

    Gary,

    Thank you for the reply.  Using the schematic and the technical reference manual, I was able to wire a level-shifted CAN transceiver to MIO pins 14&15.

    The big mystery at this point, becomes the nuts-and-bolts mechanics of assigning MIO pins to the CAN controller.  I am running the ubuntu based Linux distro provided by Xilinx, but have been unable to locate any documentation regarding which binaries will report the status of things like the MIO pins, which /proc entries do I tickle to connect them, etc.

    Are you aware of any documentation that can help me get a sense for how to do things with my zynq using the command-line?

    Thanks again,
    Harrison

  • 0

    Most of my experience is with the Vivado GUI but I think you will be using tcl from the command line. As this Answer Record  suggests ( http://forums.xilinx.com/xlnx/board/crawl_message?board.id=Vivado&message.id=1820 ) Xilinx Users Guides UG834 and UG894 are probably a good place to start.

     

    You might also want to take a look at the TCL Community on the Xilinx Community Forums: http://forums.xilinx.com/t5/Vivado-TCL-Community/bd-p/Vivado

     

    If you do a search for "vivado command line" also turns up some interesting answer records.

     

    Perhaps some other forum members have more command line experience to relate.

     

    -Gary

  • 0 in reply to Former Member


    Gary,

    There seems to have been a miscommunication.  I'm not looking for a way to configure a project on my laptop, I'm looking for an instruction that can be executed by the arm core itself.

    ie:

    minicom -D /dev/tty.usbmodem...

    -- OR --

    ssh root@my-zedboard-running-ubuntu

    root@my-zedboard-running-ubuntu ~ $ some-awesome-binary show-mio-status
    ...
    ...

    root@my-zedboard-running-ubuntu ~ $ some-awesome-binary set-mio-pin --mio=14 --tgt=can-0-rx
    root@my-zedboard-running-ubuntu ~ $ some-awesome-binary set-mio-pin --mio=15 --tgt=can-0-tx

    The TCL scripts seem to be geared towards interaction with the development environment rather than with the production environment.

    Do you think Xilinx included such an instruction, or DMA memory address, or ... to allow the ARM to configure the MIO pins?

    Thanks again for helping,
    Harrison

  • 0

    Take a look at the ARM System Level Control Registers section ( Appendix B.28 in the Zynq TRM, UG585 is a good place to start) of the Technical Reference Manual for Zynq. These configurations are controlled by the ARM System Registers. As an example, MIO Pin 14 I/O is selected by the MIO Pin 14 Control Register at address 0x00000738. You can read the state set by the ps7_init.c (or ps7_init.tcl for JTAG boot) but you should be very careful to understand the complete configuration state before changing register values.

     

    -Gary