Are there any zedboard reference designs based entirely on scripts and plain HDL files? It would be optimal if it was using "create_ip -name processing_system7" to build the ARM subsystem.
Are there any zedboard reference designs based entirely on scripts and plain HDL files? It would be optimal if it was using "create_ip -name processing_system7" to build the ARM subsystem.
Hi there,
We have been moving all of our designs over to this flow. Not all are moved at this time. There is also documentation that is being worked on, not released at this time. If you are adventurous, feel free to dive in.
The new architecture has been designed to allow you the flexibility to test the code on our reference boards, then implement the same or similar structure on your own system.
You can find the specific design documentation listed under:
http://zedboard.org/support/design/1521/11
And the HDL/etc. is located here:
https://github.com/Avnet/hdl
*Note that Zynq is a PS first SoC. That means, anything you make that is 100% HDL and runs ONLY in the PL, must have some component to run in the PS to at least load the PL. The IBERT design gets around this, however it uses JTAG to load the PL.
--Dan
Thank you. Looks like a good start. I was also hoping to find a plain HDL (Verilog or VHDL) file containing an instantiation of the processing_system7_0 where the ports are connected to the correct pins of the top.
I tried to run some of the tcl files in your repository, but it seems like I run into errors with the VHDL wrapper files in both cases (empty port map):
vivado -mode tcl -source make_zedboard_ali3_amp10.tcl
...
...hdl/Projects/zedboard_ali3_amp10/ZEDBOARD/zedboard_ali3_amp10.runs/synth_1/runme.log:19:ERROR: [Synth 8-2715] syntax error near ) [...hdl/Projects/zedboard_ali3_amp10/ZEDBOARD/zedboard_ali3_amp10.srcs/sources_1/bd/zedboard_ali3_amp10/hdl/zedboard_ali3_amp10_wrapper.vhd:24]
vivado -mode tcl -source make_zedboard_ali3_sharp7.tcl
...
...hdl/Projects/zedboard_ali3_sharp7/ZEDBOARD/zedboard_ali3_sharp7.runs/synth_1/runme.log:19:ERROR: [Synth 8-2715] syntax error near ) [...hdl/Projects/zedboard_ali3_sharp7/ZEDBOARD/zedboard_ali3_sharp7.srcs/sources_1/bd/zedboard_ali3_sharp7/hdl/zedboard_ali3_sharp7_wrapper.vhd:24]
I'm using Vivado v2015.4 on Linux.
Hi there,
There are a lot of dependency structures that need to be put into place. You should follow the instructions for that project and run it based on them. That will ensure that you get a proper set of files as well as execute the scripts from the correct locations.
If you are using a project that has an associated tag for 2015.4, you should be AOK. Again, the project instructions will explain this. Also, we do test these under Linux as well. You should be AOK there.
--Dan
Thanks. I understand that there must be a lot of dependencies.
Not 100% sure which instructions you are talking about, but I assume it's these:
http://zedboard.org/support/design/1521/11
Then this entry is labeled 2015.4:
http://zedboard.org/sites/default/files/design/FMCHC_PYTHON1300C_Tutorial_2015_4_01.zip
Which contains the file:
FMCHC_PYTHON1300C_Tutorial_2015_4_01.pdf
Which says:
10. Edit the make_fmchc_python1300c.tcl script to only build for your FMC carrier.
Then I look for a tag with a recent date and check out out:
git checkout fmchc_python1300c_MZ7020_FMCCC_20151209_154235
The default "Getting Started design for the MicroZed-7020 + FMC Carrier Card" is fine for my initial test.
Next step is:
"1. From the Start menu, open the u201CVivado 2015.4 TCL Shellu201D console"
However I'm on Linux and don't have a "Start" menu so I simply run:
vivado -mode tcl -source make_fmchc_python1300c.tcl
****** Vivado v2015.4 (64-bit)
**** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015
**** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source make_fmchc_python1300c.tcl
# set argv [list board=MZ7020_FMCCC project=fmchc_python1300c sdk=yes version_override=yes]
# set argc [llength $argv]
# source ./make.tcl -notrace
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*- -*
*- Welcome to the Avnet Project Builder -*
*- -*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
+------------------+------------------------------------+
| Setting | Configuration |
+------------------+------------------------------------+
| Board | MZ7020_FMCCC |
+------------------+------------------------------------+
| Project | fmchc_python1300c |
+------------------+------------------------------------+
| SDK | yes |
+------------------+------------------------------------+
| Version override | yes |
+------------------+------------------------------------+
Overriding Version Check, Please Check the Design for Validity!
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Selected Board and Project as:
MZ7020_FMCCC and fmchc_python1300c
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Not Requesting Tag
Setting Up Project fmchc_python1300c...
***** Generating IP...
***** Creating Vivado Project...
couldn't read file "../Boards/MZ7020_FMCCC/mz7020_fmccc.tcl": no such file or directory
while executing
"source ../Boards/$board/[string tolower $board].tcl -notrace"
(file "./ProjectScripts/fmchc_python1300c.tcl" line 108)
while executing
"source ./ProjectScripts/$project.tcl -notrace"
("MZ7020_FMCCC" arm line 2)
invoked from within
"switch -nocase $board {
PZ7015_FMCCC -
PZ7030_FMCCC -
PZ7010_FMC2 -
PZ7020_FMC2 ..."
(file "./make.tcl" line 279)
while executing
"source ./make.tcl -notrace"
(file "make_fmchc_python1300c.tcl" line 46)
Vivado%
Which seem to fail due to a missing a file.
Which SHA1/tag can I check out, and which script could I expect to work with 2015.4?
Hi there,
I'm happy you got this far. I've asked my colleague to take a peek at this. He has a lot more Linux build experience than I do. Which hardware set are you attempting to build for?
In the mean time, take a look at the instructions. It actually says to pull down the tag "fmchc_python1300c_PZ7030_FMC2_20160223_221823"
However, looking in the repository, the file that your error states is not there, seems to be there.
https://github.com/Avnet/hdl/tree/fmchc_python1300c_MZ7020_FMCCC_20151209_154235/Boards/MZ7020_FMCCC
I think the issue with this MIGHT be that the script appears to be looking for "mz7020_fmccc.tcl", while the file is actually named:
"MZ7020_FMCCC.tcl"
As I am sure you are aware, Linux sees case as a differentiator for files.
To get you past this, can you try renaming the file, and re-run the script?
cd to the Boards folder for the mz7020_fmccc
then "mv MZ7020_FMCCC.tcl mz7020_fmccc.tcl"
Let me know how that works out for you.
--Dan
Thank you.
It would probably be better to fix the part which generates the filenames to return the correct case. Or even use all lower case directory and filenames.
Making a symbolic link:
$ cd Boards/MZ7020_FMCCC
$ ln -s MZ7020_FMCCC.tcl mz7020_fmccc.tcl
Gets me a bit further:
vivado -mode tcl -source make_fmchc_python1300c.tcl
...
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Selected Board and Project as:
MZ7020_FMCCC and fmchc_python1300c
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Not Requesting Tag
Setting Up Project fmchc_python1300c...
***** Generating IP...
***** Creating Vivado Project...
ERROR: [Board 49-71] The board_part definition was not found for em.avnet.com:microzed_7020:part0:1.0. The project's board_part property was not set, but the project's part property was set to xc7z020clg400-1. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store.
while executing
"source ./ProjectScripts/$project.tcl -notrace"
("MZ7020_FMCCC" arm line 2)
invoked from within
"switch -nocase $board {
PZ7015_FMCCC -
PZ7030_FMCCC -
PZ7010_FMC2 -
PZ7020_FMC2 ..."
(file "./make.tcl" line 279)
while executing
"source ./make.tcl -notrace"
(file "make_fmchc_python1300c.tcl" line 46)
Vivado%
However, my goal was to find an example on how to instantiate processing_system7, but browsing through the tcl it seems like block design (bd) is used in all cases.
Hi there,
I'm glad to see you still making progress!
Maybe I am misunderstanding, but if you want the PS to be defined in a PL design, using Vivado the easiest way to do that is to drop the PS7 IP into a Block Design. Then you can double click that to customize it. From there, you can grab the script output from the TCL console, or use the command write_bd_tcl to output everything from that session.
If I am wrong, can you provide a bit more detail, or help me to understand what it is you are looking for?
Thanks!
--Dan
Actually, it's the BD step that I would like to avoid since it's a based upon manual work using the GUI, despite that it can be scripted in later runs. I would like to generate IP's using "create_ip" and then simply instantiating it in my HDL code.
Hi there,
As far as I know, you need to use the BD in order to instantiate the PS7.
I have already scripted everything in the repository - as you pointed out. Since this is already done you can avoid the GUI by using that code if that PS configuration is suitable for you.
What I am confused about is why you are trying to avoid the GUI. The easiest path forward is use it once to set everything up. From then on it is a matter of copy/paste the TCL command.
--Dan