Actions
Forum Thread Details
  • State Not Answered
  • Replies 9 replies
  • Subscribers 353 subscribers
  • Views 653 views
  • Users 0 members are here
Related

Scripted reference design?

Former Member

Are there any zedboard reference designs based entirely on scripts and plain HDL files? It would be optimal if it was using "create_ip -name processing_system7" to build the ARM subsystem.

Parents
  • 0

    Hi there,

    We have been moving all of our designs over to this flow.  Not all are moved at this time.  There is also documentation that is being worked on, not released at this time.  If you are adventurous, feel free to dive in.

    The new architecture has been designed to allow you the flexibility to test the code on our reference boards, then implement the same or similar structure on your own system. 

    You can find the specific design documentation listed under:
    http://zedboard.org/support/design/1521/11

    And the HDL/etc. is located here:
    https://github.com/Avnet/hdl

    *Note that Zynq is a PS first SoC.  That means, anything you make that is 100% HDL and runs ONLY in the PL, must have some component to run in the PS to at least load the PL.  The IBERT design gets around this, however it uses JTAG to load the PL.

    --Dan

Reply
  • 0

    Hi there,

    We have been moving all of our designs over to this flow.  Not all are moved at this time.  There is also documentation that is being worked on, not released at this time.  If you are adventurous, feel free to dive in.

    The new architecture has been designed to allow you the flexibility to test the code on our reference boards, then implement the same or similar structure on your own system. 

    You can find the specific design documentation listed under:
    http://zedboard.org/support/design/1521/11

    And the HDL/etc. is located here:
    https://github.com/Avnet/hdl

    *Note that Zynq is a PS first SoC.  That means, anything you make that is 100% HDL and runs ONLY in the PL, must have some component to run in the PS to at least load the PL.  The IBERT design gets around this, however it uses JTAG to load the PL.

    --Dan

Children
No Data