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ZedBoard Hardware Design Turn led ON when fifo is full
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Turn led ON when fifo is full

Former Member
Former Member over 10 years ago

Hi, I am writing a stream of data to DDR and then reading that data and writing it to sdcard. But the writing on DDR starts when there is valid from my input and ready from AXI DMA. As now i want to write data of ADC to DDR there will be no "ready" from DMA. I want to use in between fifo. First i want to write data to fifo untill an interrupt came and when there is an interrupt transfer fifo's data to DDR and the cycle continues.
Help needed for:

How can i use fifo to write data to fifo and read data from fifo? And Then turn the led on ZedBoard ON when fifo is full.

Regards;

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  • bhfletcher
    0 bhfletcher over 10 years ago

    Have you also asked this same question on the Xilinx forums? I would recommend that since this is a specific question internal to Zynq. It would be helpful to know which FIFO IP that you are using.

    Bryan

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  • bhfletcher
    0 bhfletcher over 10 years ago

    Have you also asked this same question on the Xilinx forums? I would recommend that since this is a specific question internal to Zynq. It would be helpful to know which FIFO IP that you are using.

    Bryan

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  • Former Member
    0 Former Member over 10 years ago in reply to bhfletcher

    Hey bryan i am using axi4 stream FIFO IP.

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  • bhfletcher
    0 bhfletcher over 10 years ago in reply to Former Member

    Have you looked at the examples in the Xilinx tool installation?

    C:\Xilinx\SDK\2015.2\data\embeddedsw\XilinxProcessorIPLib\drivers\llfifo_v5_0\examples

     

    Bryan

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