Hi all,
I am new to the Zedboard and am working up to transferring a complex hardware accelerator I currently have working on a regular FPGA board.
Anyway I want to walk before I can run so have done the speedway tutorials and am now toying around with small projects. My first of which being an simple adder accelerator:
-Send 2 numbers to the pl, to reg a and b
-the pl adds the numbers
-an interrupt signals the computation has finished.
-PS reads the result from reg c
For this design I am using 3 registers (a,b,c) in the AXI interconnect, I have created the IP templates using CIP.
Basically though what is the best way send a control signal to enable the addition to the PL. So how should I signal to the PL adder that I have loaded the two numbers in reg a and b and now want to add them?
-Should I create a 1bit signal GPIO interconnect, add a 4th 4 bit control register? or is there a more 'stylish' way to do this by using the BUS2IPdata signals?
-Or is there another way to create custom PS to PL control enable signals?
Many thanks
Sam
