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PL pin assignment?

opolychr

Hello all,

I have recently purchased a Zedboard and now trying to make a small design with PS-PL and some custom AXI peripherals with custom VHDL code. What I havent figured out yet is how I assign some output signals to pins on the PL side. I havent found any tutorial on this and I do not know where I can find the process.

Thanks

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    Hi opolychr,

    In your logic design you may have some top level signals that you wish to connect externally.  Those nets must be constrained to physical pin locations through the use of an XDC file which specifies the NET name connection within the logic design as well as the physical pin location that it will be connected to.

    There is an example of how to use a constraints file in a design.  There is some information on how to include a constraints file in a design within the 2014.2 "Zynq Concepts, Tools, and Techniques on ZedBoard" tutorial on the ZedBoard Reference Design/Tutorials page:

    http://microzed.org/support/design/1521/11

    Regards,

    -Kevin

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    Hi opolychr,

    In your logic design you may have some top level signals that you wish to connect externally.  Those nets must be constrained to physical pin locations through the use of an XDC file which specifies the NET name connection within the logic design as well as the physical pin location that it will be connected to.

    There is an example of how to use a constraints file in a design.  There is some information on how to include a constraints file in a design within the 2014.2 "Zynq Concepts, Tools, and Techniques on ZedBoard" tutorial on the ZedBoard Reference Design/Tutorials page:

    http://microzed.org/support/design/1521/11

    Regards,

    -Kevin

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