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ZedBoard Hardware Design Zedboard - writing mcs file to flash - can't make that happen
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  • zedboard
  • FLASH programming
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Zedboard - writing mcs file to flash - can't make that happen

TorstenS
TorstenS over 1 year ago

Hello - I've been trying to get the MCS generated in SDK  to be written to the flash on the Zedboard. The installed Flash is an S25FL256S Quad SPI. 

The board does boot from the flash with the jumpers J7 thourgh J11 set  to '00010'. At least this indicates the FLASH is in working order.

Writing to to the flash:

  1. Generating basic ‘LED on’ PS/PL in Vivado 2018.3 and SDK 2018.3 (runs fine when just uploading bit file into Zynq from the SDK, and launching the .elf file from the SDK)
  2. In SDK generating FSBL and .mcs file (files are generated as ‘Release’)
  3. Setting JP7 through JP11 all to logic ‘0’
  4. In SDK run XILINX->Program Flash

This is the SDK console output I've been getting:

Connected to hw_server @ TCP:127.0.0.1:3121

Available targets and devices:

Target 0 : jsn-DLC10-00001b311f3601

       Device 0: jsn-DLC10-00001b311f3601-4ba00477-0

Retrieving Flash info...

Initialization done, programming the memory

===== mrd->addr=0xF800025C, data=0x00000000 =====

BOOT_MODE REG = 0x00000000

Downloading FSBL...

===== mrd->addr=0xF8000110, data=0x00177EA0 =====

READ: ARM_PLL_CFG (0xF8000110) = 0x00177EA0

===== mrd->addr=0xF8000100, data=0x0001A008 =====

READ: ARM_PLL_CTRL (0xF8000100) = 0x0001A008

===== mrd->addr=0xF8000120, data=0x1F000400 =====

READ: ARM_CLK_CTRL (0xF8000120) = 0x1F000400

===== mrd->addr=0xF8000118, data=0x00177EA0 =====

READ: IO_PLL_CFG (0xF8000118) = 0x00177EA0

===== mrd->addr=0xF8000108, data=0x0001A008 =====

READ: IO_PLL_CTRL (0xF8000108) = 0x0001A008

Problem in Initializing Hardware

Flash programming initialization failed.

 

ERROR: Flash Operation Failed

I've tried writing to the flash from Vivado instead of the SDK - in VIVADO there is a whole family of S25FL256S flashes available. Out of desperation I tried them all - all resulting in the same message as above.

Any support and insight into this problem is greatly appreciated.

Thank you in advance!

Torsten

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  • flyingbean
    flyingbean over 1 year ago +1
    Please check BIF file for MCS image as this before you jump into any conclustions: An MCS image for Zynq usually contains a First stage boot loader image (FSBL), FPGA bitstream, Arm® trusted firmware…
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  • flyingbean
    0 flyingbean over 1 year ago

    Please check BIF file for MCS image as this before you jump into any conclustions:

    An MCS image for Zynq usually contains a First stage boot loader image (FSBL), FPGA bitstream, Arm® trusted firmware, U-Boot, DTB, and Kernel Fit image (optional).

    Zynq FPGA will need FSBL for booting sequence even if it is a bare-metal API image.

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  • TorstenS
    0 TorstenS over 1 year ago in reply to flyingbean

    Thank you Flyingbean for giving this problem a quick look! Very much appreciated!

    The BIF file only includes paths to

    1. the FSB.ELF
    2. the wrapper.bit and
    3. the elf of the software running on the arm.

    There is no entry pointing to the MCS file. I take it the MCS file path needs to be in there as the last entry?

    I just manually added that path to the MCS. Excellent! Flash is being programmed

    Thank you very much!!
    Torsten

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  • TorstenS
    0 TorstenS over 1 year ago in reply to flyingbean

    Thank you Flyingbean for giving this problem a quick look! Very much appreciated!

    The BIF file only includes paths to

    1. the FSB.ELF
    2. the wrapper.bit and
    3. the elf of the software running on the arm.

    There is no entry pointing to the MCS file. I take it the MCS file path needs to be in there as the last entry?

    I just manually added that path to the MCS. Excellent! Flash is being programmed

    Thank you very much!!
    Torsten

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