tStop layer misaligned

I have many ICs in my design... ( all digital )...

but one of the Components ( a PNP MOSFET transistor) appears misaligned when I enable "Layer 29" on the LAYOUT Editor... see picture attached...

The Other components show the "tSop" mask perfectly aligned...

QUESTIONS...

1) What can I do to get them aligned in the LAYOUT Editor

2) If I do not correct this misalignment, can I get a SHORT CIRCUIT ?...

3) Why does this happens in some components and not others ?...

Parents

0 Former Member over 9 years ago

seems very bad!

What happens when you run DRC (with layer 29 enabled)?
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0 hjengineer over 9 years ago in reply to Former Member

Fred W...
     Thanks for your prompt attention to this problem.
After a few hours of thinking, observation and research... but mainly GOOD LUCK...
I discovered the problem originated in the LIBRARY !!!...

This is what happened...
I got the device/package from an original Library from NXP, for the SOT1220 package...
and this had the MISPLACED tStop mask in it...
BUT BECAUSE EAGLE Cad has the "tStop" layer OFF by default ( while editing the package), I was unable to discover this error originally.
The problem is now fixed... but it cost me a few hours which I could have saved if the suggestion below is implemented

SUGGESTION:
   Please make the "tStop" layer ON by default in both the Library editor and Layout editor...
   It will go a long way towards eliminating problems like mine,
   as well as helping the original "designers" of library packages to check their work before distributing to the community.
The original library that (still) contains the error ( pck SOT1220) is...
https://github.com/Sns22/Eagle_PCB_Libraries/blob/master/NXP-libs/nxp_60.lbr
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0 Former Member over 9 years ago in reply to hjengineer

Hooray!!
Thanks for pointing out the specific library that still contains the error.
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0 Former Member over 9 years ago in reply to hjengineer

Hooray!!
Thanks for pointing out the specific library that still contains the error.
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