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Blog [FRDM-K64F - PE] Tutorial: Get the Maximum Speed of 120MHz
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  • Author Author: bheemarao
  • Date Created: 15 Jul 2014 12:45 AM Date Created
  • Views 970 views
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  • Comments 2 comments
  • freedom-board
  • freescale
  • kinetis
  • frdm-k64
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[FRDM-K64F - PE] Tutorial: Get the Maximum Speed of 120MHz

bheemarao
bheemarao
15 Jul 2014

“This tutorial was extracted from Erich Styger blog http://mcuoneclipse.wordpress.com with his agreement.”


The ARM Cortex-M4F on the Freescale FRDM-K64F board can run up to 120 MHz. Here is how to get it running with maximum speed:


FRDM-K64F Board

                                             FRDM-K64F Board



Below figure shows the block diagram of the FRDM-K64F design along with primary components and their placement.


image


The Kinetis MCU startup from an internal digitally-controlled oscillator (DCO). Software can enable the main external oscillator (EXTAL0/XTAL0) if desired. The external oscillator/resonator can range from 32.768 KHz up to 50 MHz. The default external source for the MCG oscillator inputs (EXTAL) is 50 MHz clock source from Micrel Ethernet PHY.


There are three clock sources which can be given to this board


1) The 32.768 KHz crystal is connected to the RTC oscillator inputs EXTAL32 (RTC block as shown in below figure).

2) The Ethernet PHY will provide 50 MHz clock to MCU EXTAL0 (system osc block in below figure)

3) The IRC 48MHz present internally (IRC48M internal osc as shown in below figure)


The K64F processor on the board has many clock options as shown here:

image

               K64F clocking diagram (Source: Freescale K64F Reference Manual)


The RTC oscillator (EXTAL32, XTAL32) clock on the board is a 32 kHz oscillator:


32 kHz Clock


The Y3 is nearby the CPU:


image


                                   32.768 kHz Clock on FRDM-K64F


This clock can be used with the FLL, but does not allow a system clock above 100 MHz image


so next option is, the System Oscillator block which can be used (EXTAL0/XTAL0):


Main Clock (Source: FRDM-K64F Schematics)


                              Main Clock (Source: FRDM-K64F Schematics)


The XTAL0 is connected to ground, and EXTAL0 is connected to the Micrel Ethernet PHY chip which has a 25 MHz crystal attached:


25 MHz and Micrel PHY

                              25 MHz and Micrel PHY (Source: FRDM-K64F Schematics)


The picture below shows the clock and the PYH


25 Mhz and PHY

                                                  25 Mhz and PHY


The important thing to know is that the output clock (REF_CLK) is twice of the 25 MHz clock: a 50 MHz oscillator clock. With this information, I can configure the settings of the CPU in Processor Expert as below to produce a 120 MHz PLL output:


120 MHz PLL output

                                    120 MHz PLL output configuration in Processor Expert


This gives me a 120 MHz core clock:


120 MHz Core Clock

                                   120 MHz Core Clock


The other option available is IRC internal reference clock. If you carefully inspected the clocking block diagram, you should have noticed that there is a 48 MHz internal reference clock. This is something very cool Freescale has finally introduced: with this it is possible to use the K64F for USB operation *without* the need for an external reference clock. And of course this one can be used to reach 120 MHz too. Simply select that 48 MHz clock as reference clock:


Internal Reference Clock with 48 MHz

                         Internal Reference Clock with 48 MHz


So I have two ways on the FRDM board to run the core at 120 MHz now image

And yes, you can try to configure the clocks without Processor Expert too. With Processor Expert it is just a few clicks, while without…. well, try to read and understand the data sheet image

Happy Speeding image


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  • mcb1
    mcb1 over 11 years ago in reply to michaelkellett

    MK

    You might be better sending the note to Erich via his blog or on the Freescale community.

    He's very good at answering, but I also have his email from the last query.

     

    Mark

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  • michaelkellett
    michaelkellett over 11 years ago

    The problem with using these fancy graphic thingies to set up the processor is that you may have no idea what code it has made. You become completely dependent on the continuing existence of the graphical tool and the ability to run it. It's also very hard to maintain version control. For playing none of this matters but if you want to do any kind of project which needs to be maintained then you will need version control and the ability to rebuild the code years later.

    Frequently the graphical tools don't even cover all the possibilities.

    How does this tool keep it's information - is it in a visible file that can be version controlled.

    What code does it make and what are the dependencies of that code ?

    If the data sheet is really not understandable (which I doubt - Freescale's docs are usually quite good) -  it would be better if effort went into sorting that rather than making graphical tools.

    I use ST Cortex processors a lot and it really isn't that hard to understand how to set up the peripherals directly (the clock systems are of similar complexity).

     

    MK

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