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Using a Cypress PSoC5 to Sniff Out PCB Shorts

tpcipri

Tracking down and finding short circuits on a PCB can always be a challenge. The resistance can be down to micro-Ohms. Not every meter can measure that low and the meters that can measure micro-Ohms are very costly and you still have to deal with noise picked up in the cables and the variable resistance caused by pressure variations when probing.


Often engineers and technicians will resort to destructive methodologies such as cutting traces, lifting pins on ICs or applying high current to “blow out” the short circuit or use freeze spray to find hot spots. Each of these potentially destructive methods can lead to long term reliability issues. For instance, cutting traces and lifting IC pins reduce the reliability of the board. Using a power supply to heat or blow out the short circuit risks damaging the board beyond repair by either causing it to delaminate or, if the power supply doesn’t regulate below 200mV when the short blows, damage or destroy semiconductors on the board. A whole paper can be written on the perils of blowing shorts covering topics that include decreasing trace geometries, semiconductor stress, power supply regulation, inductive kickback and thermal damage to laminations.


This post presents a cost effective solution using a Cypress PSoC5LP (http://www.cypress.com/?id=4562&source=productshome) working as a micro-Ohm/micro-volt meter using either 3 or 4 test leads.  Either the PSoC3 or PSoC5LP will work as they both have the requisite IDAC and 20-bit ADC.

Details

The diagrams below are drawn with the free Cypress PSoC Creator tool. The design started with a sample project from PSoC Creator “ADC_DelSig Example project” intended to use with the CY8CKIT-050LP evaluation kit. The example project shown here shows how to use the ADC to drive the display provided in the development kit. The displayed values will be in volts. After starting with the sample project, the design was expanded to include the other components. Cypress has a rich set of sample projects and application notes and very often one of them can be used as a starting point to familiarize yourself with key aspects of the device. This video shows how to load sample projects from PSoC Creator so you can quickly start your own projects.

 

 

 

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Another helpful example project found in the CY8CKit-050LP folder under “Find Example Projects” is VoltageDisplay_DelSigADC.cywrk. This example is similar to the ADC_DelSig Example project but filters out noise and the source code is more complex which is why it wasn’t used here. The VoltageDisplay_DelSigADC.cywrk also converts the measurements to uVolts using PSoC Creator’s built in conversion routines.

 

In the following diagram the section of circuit between the IDAC8 and PGA are external to the PSoC5LP and only 3 resistors plus bypass capacitors are required to realize this design. The red dashed line shows current flow through the variable resistance path of the connectors and test leads. Even when the contact and lead resistance are varying, the voltage drop across short circuit remains constant and the low currents from the ISource_DAC keep the circuit from heating up and changing the resistance of the short.

 


 


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The design limits the voltage to 100 mV to keep semiconductors on the board from being biased on and the programmable current of the ISource_DAC prevents destructive currents from flowing. Firmware can be written to source low currents and increase until the test current puts out approximately 1V. The PGA has software selectable gain starting at 1 that doubles up to the highest gain of 50 making the circuit extremely sensitive. The delta-sigma ADC is set for 20-bits and with the reference set to 1 Volt the resolution is about 1uV. The R_1 and R_2/R_4 divider are for protection against accidental connection to a live circuit. R_3 allows you to use 3 wires instead of 4 wires.

 

Firmware

The example project software can be used almost as is with a few minor changes. The ISource_DAC_Start() and PGA_1_Start functions should be called right before the ADC_DelSig_1_Start() function is called. The ISource_DAC current defaults to ½ the Range set in the IDAC_Source configuration screen. Since R_1 and R_r divide the measured voltage by 2 then the ADC measurement should be scaled accordingly.

Using the Circuit to Find Shorts

For best results four leads should be used with a shielded cable and short lead lengths for the measurement leads. The leads coming from J_1 are connected across the shorted traces at any point that is easily accessed. The P_2 pin 2 can be omitted or connected anywhere on the trace connected to J_1 pin 2. If P_2 pin 2 is connected then the measurement accuracy can be improved but for finding short circuits we are only interested in relative readings. The lead from P_2 pin 1 is used to track the short down. Start at any point on the trace connected to P_1 pin 1. Move the probe to exposed nodes on the trace. The voltage will increase as you move further from the short, decrease as you get closer to the short and have no change when you take a branch of the circuit that is moving away from the short as there is no current flowing through that branch. Once you find the lowest resistance point use circuit trace printouts to determine the point where the traces come in close proximity to one another near the low resistance location. It may require removing parts to expose the short if it is underneath a component.

 

Readers might also be interested in the following element14 discussions:

 

PSoC 5 PCB Design Using Eagle

http://www.element14.com/community/message/88614#88614/l/re-psoc-5-pcb-design-using-eagle

Upcoming PSoC 5LP/Pioneer board Mini-Challenge

http://www.element14.com/community/message/90573#90573/l/keep-your-eyes-open-for-monday

 

And the following App Note on element14 will prove useful:

 

Cypress: Application Note (AN77759) for Getting Started with PSoC 5LP

http://www.element14.com/community/docs/DOC-54462/l/cypress-application-note-an77759-for-getting-started-with-psoc-5lp


Attachments:
image
CircuitTracerDemo_Blog_Copy-000.cywrk.Archive01.zip

  • When I first developped this concept it was using a $10,000 HP3452  6 1/2 digit DMM. The point of this BLOG was to show how you can use a low cost development kit to accomplish the objective. There are lots of cool embelishments you can do.  For this simple application all you need is a current source and good ADC.

  • I once had a nifty gadget called a Short Squeak.  It was a probe-shaped milli-ohmmeter with audio output, which would increase in pitch as you got closer to the short, basically working as a variable-frequency oscillator controlled by resistance.  Great tool, plus the sound drives your colleagues crazy so they go away and leave you alone image

     

    It would be pretty easy to add audio to this PSoC5 application.

  • in reply to hlipka

    You can find trace resistances on http://circuitcalculator.com/wordpress/2006/01/24/trace-resistance-calculator/. A 5 mil trace with 1/2 oz copper will have about 0.2 Ohms per inch and would drop about 20nV per inch. If you are not comfortable measuring those levels then the IDAC has 3 ranges: 0 - 31.875uA; 0 - 255 uA; and 0 - 2.04 mA. Higher currents can be used by lowereing the R_1 and R_5 resistor values accordingly. At 2mA test current the same trace would drop 4mV per inch.  With the PGA gain set to 1 and the delta sigma full scale input of 1.04V the resolution will be 1uV and can easily measure the minuted drops across the trace.

     

    The problem with the suggestion of measuring the voltage drop across J1 is that the voltage will vary significantly due to contact resistance that will vary as a result of probe pressure variations. The idea of changing current based on measured voltage will work, just measure it at J2.

  • in reply to tpcipri

    I'm still not convinced. So the IDAC puts out 1µA test current. Then we have the 1M resistor meaning we have a voltage drop of 1V on it. Then we have the PCB trace we want to test. Assuming it has 1 ohm resistance, there will be a voltage drop of 1µV on this trace. In reality tghe resistance will be lower by probably a factor of 100, so we would need to measure 10nV... So I think then measurement current should be larger than that...

    Also, when the probes are connected to traces with a resistance of more than 100kOhm between them (or just a semiconductor), the IDAC will rise the voltage there above 100mV to get the current of 1µA through. Then 100k resistor you added in the larger image will fix this though.

    I would solve this by having a variable measurement current. Then the DelSig ADC can be used (via an analog mux) to measure the voltage across J1 to adopt the current when it gets too high (or maybe just a comparator).

  • in reply to hlipka

    Hello Hendrik,

     

    These are good questions. I was unable to replace the image in the post but have added a larger image and the zipped project file as attachments.

     

    You are right about the 1V/uA limit with the 1M resistor. The IDAC compliance voltage is 1V and this specific implementaion will only work to 1uA test current. The 1M is to protect the IDAC in the event the user inadvertantly connects the probe to a high voltage of up to about 1000V. The original title for the post was "Single Chip Non-Destructive Short Circuit Locator". It is non-destructive to the circuit under test and the tester itself. If you want to use higher test currents to reduce noise susceptibility then use a lower resistance value for R1. A good design not only takes into account ordinary use but also takes into account common user errors. It is all too easy for a technician or engineer to forget to power down the board under test before connecting the short circuit tester to it.

     

    There are several ways to limit the test voltage. A 100K series resistor across P1 will limit the test voltage to 100mV for an open circuit. (The attached image shows this resistor)  If you want more flexibility in the voltage clamp you can use comparators that triggers a voltage clamp when the test voltage exceeds 100mV. For a 100% PSoC hardware Implementation the comparator reference can be set by one of the extra VDACs and the comparator output  triggers a one shot that times out after 100mS. You can use an external transistor or a pin set for open drain. The beauty of using the dev-kit is you can tweak the design to suit different situation. The point of the blog is that if you are in a pinch and need to do something really quick, it can be done with the PSoC development  board with very few external components.

     

    Thanks for asking the questions and please keep us posted on using the circuit. I would recommend using shielded pairs for the leads with short stubs on the end if possible to minimize noise pickup. You can always use firmware to average the readings for a second or two to improve noise performance.