Altera: MAX V Starter Kit

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Overview

The MAX V Starter Kit is a simulation board specially made for the Altera MAX V Family of Devices. Those interested in digitizing design could realize their ideas through this experimental board. The built-in CPLD: 5M1270ZT144C5N5M1270ZT144C5N provides 1270 LEs with 114 common I/O, 8K bits User Flash Memory.The MAX V family of low cost and low power CPLDs offer more density and I/Os per footprint versus other CPLDs. Ranging in density from 40 to 2,210 logic elements (LEs) (32 to 1,700 equivalent macrocells) and up to 271 I/Os, MAX V devices provide programmable solutions for applications such as I/O expansion, bus and protocol bridging, power monitoring and control, FPGA configuration, and analog IC interface.

When you integrate MAX V devices into your designs, you'll enjoy lower total system cost because the MAX V architecture integrates previously external functions, such as flash, RAM, oscillators, and phase-locked loops. In many cases, MAX V CPLDs deliver more I/Os and logic per footprint at the same price as competitive CPLDs. The devices also use low-cost and green packaging technology, with packages as small as 20 mm².

MAX V devices feature on-chip flash storage, internal oscillator, and memory functionality. With up to 50% lower total power versus other CPLDs and requiring as few as one power supply, MAX V CPLDs can help you meet your low power design requirement.

Key Applications: Wireline, Wireless, Industrial, Consumer, Computer and Storage, Broadcast, Military.

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Development Tools

Software Development Tools:

Tool Type	Supplier	Supported Family	MPN	Description
IDE	Altera	ALL Altera Devices	Altera Quartus II	It's the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. The Altera Quartus II software, the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. Learn More

Hardware Development Tools:

Tool Type	Supplier	Support?ed Family	MPN	Description
Download Cable	Altera	ALL Altera Devices	PL-BYTEBLASTER2NPL-BYTEBLASTER2N	The ByteBlaster II enables a PC to configure or program Altera devices. The download cable drives configuration or programming data using a standard parallel printer port from the PC.
Download Cable	Altera	ALL Altera Devices	PL-USB-BLASTER-RCNPL-USB-BLASTER-RCN	The USB-Blaster drives configuration or programming data from the PC to configure or program Altera devices. The download cable interfaces to a standard USB PC port.
Download Cable	Altera	ALL Altera Devices	PL-ETH2-BLASTERPL-ETH2-BLASTER	The EthernetBlaster can receive configuration or programming data from the Ethernet network to remotely configure or program Altera devices. The communications cable connects to a standard Ethernet network port with an RJ-45 connector.

Technical Documents

Learning Center

Type	Description
User Guide	Altera: Quick Start Guide for MAX V CPLD Development Kit
User Guide	Altera: User Guide for MAX V CPLD Development Kit
User Guide	Altera: Mechanical Design Guide for MAX V CPLD Development Kit
User Manual	Altera: User Manual for MAX V Starter Kit
Reference Manual	Altera: Reference Manual for MAX V CPLD Development Board

Design Elements

Type	Description
Schematics	Altera: Schematics File for MAX V CPLD Development Kit
Layout	Altera: Layout File for MAX V CPLD Development Kit
BOM	Altera: BOM File for MAX V CPLD Development Kit
Application Library	Altera: Software Code for MAX V CPLD Development Kit

Video

Kit Features

The following list summarizes the MAX V device family features:

Low-cost, low-power, and non-volatile CPLD architecture
Instant-on (0.5 ms or less) configuration time
Standby current as low as 25 μA and fast power-down/reset operation
Fast propagation delay and clock-to-output times
Internal oscillator
Emulated RSDS output support with a data rate of up to 200 Mbps
Emulated LVDS output support with a data rate of up to 304 Mbps
Four global clocks with two clocks available per logic array block (LAB)
User flash memory block up to 8 Kbits for non-volatile storage with up to 1000 read/write cycles
Single 1.8-V external supply for device core
MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, 1.5-V, and 1.2-V logic levels
Bus-friendly architecture including programmable slew rate, drive strength, bus-hold, and programmable pull-up resistors
Schmitt triggers enabling noise tolerant inputs (programmable per pin)
I/Os are fully compliant with the PCI-SIG PCI Local Bus Specification, revision 2.2 for 3.3-V operation
Hot-socket compliant
Built-in JTAG BST circuitry compliant with IEEE Std. 1149.1-1990

Kit Contents

The MAX V Starter Kit supplied with below contents:

Altera MAX V Main Board
USB Cable
CD-ROM