Freescale: P2041RDB-PA QorIQ Reference Design Board

Kit Overview

The P2041RDB-PAP2041RDB-PA is a compact (micro-ATX), highly integrated reference design board featuring the quad-core P2041 device. With its 1.5 GHz P2041 and rich input/output (I/O) mix, the board is designed for evaluating the P2041 and P2040 in networking and Ethernet-centric applications.

The P2041RDB-PAP2041RDB-PA board which exercises most capabilities of the device, can serve as a reference for the customer’s hardware development. It can also be used as a debug tool to check behaviors on the board compared to behaviors seen on customer boards. It can be used for software development and performance evaluation prior to the customer’s own board being ready. While the P2041RDB uses the superset P2041 device, it can also be configured to look like the more cost-effective subset device, the P2040.

The P2041 processor is based upon the e500mc core, built on Power Architecture technology, offering speeds of 1200–1500 MHz. It has a three-level cache hierarchy with 32 KB of instruction and data cache per core, 128 KB of unified backside L2 cache per core, and 1 MB of shared frontside CoreNet platform cache fronting the memory controller. I/Os include 10 SerDes lanes running at up to 5 GHz, multiplexed across three PCI Express Gen2 controllers, one 10 gigabit Ethernet (GE) XAUI interface, five 1 GE SGMII interfaces, four 2.5 Gb/s SGMII interfaces, two Serial RapidIO (version 1.3 with features of version 2.1) interfaces, two SATA 2.0 interfaces and the high-speed Aurora debug interface.

It has a 64-bit DDR3 and DDR3L (low power) DRAM interface with 8-bit ECC support running at up to 1333 MHz data rate. It includes two USB 2.0 interfaces (including PHY), two dual universal asynchronous receiver/transmitters (DUARTs), an SD/MMC interface, a 16-bit local bus, four I2C and SPI. It also includes the accelerator blocks collectively known as the Data Path Acceleration Architecture (DPAA) that offload various tasks from the core, including routine packet handling, security algorithm calculation and pattern matching.

The P2041RDB-PAP2041RDB-PA offers significant flexibility in allocating its 10 SerDes lanes to various functions. Its base configuration supports three SGMII ports and two RGMII ports, a 2-lane PCI Express slot, and two SATA ports (one populated with a 320 GB hard drive). In other configurations, it can have two 4-lane PCI Express slots, which can be populated with off-the-shelf PCI Express cards or Freescale’s XAUI-RISER card

The P2041RDB-PAP2041RDB-PA is pre-loaded with an Embedded Linux Essentials for QorIQ Processors with Data Path Acceleration development kit. This kit includes a 2.6.x.x SMP Linux kernel, hugetlbfs for applications with a large memory footprint, user space DPAA for high-performance packet handling, u-boot, the GCC tool chain and Mentor System Builder, among many other features.

Key Applications:

• Control plane and mixed control plane/data plane in switches and routers,Unified threat management,Base station network interface and baseband cards,Aerospace and defense,Multifunction printers and factory automation.