Hi,
If you look at the Interconnnecting and Packaging Electronic Circuits (IPC) document IPC-7351, it appears that the footprint (PCB land pattern) required for any given SMD component will depend on the soldering method used in the underlying PCB assembly procedure. Specifically, Reflow Soldering will require a slightly different land pattern than Wave Soldering for the same device.
Now there is a naming convention for IPC footprints, of which RESC2013X65N is an example. Such a name does not appear, on the face of it, to have any field to distinguish which soldering method is foreseen for it. Furthermore, such names are in use in package definitions in Eagle Libraries, without any indication even in the comment lines about the soldering procedure foreseen.
Do potential users of the Eagle Libraries, for example those made available by Element14, just use those footprints without question or is there a commonly held understanding about the assumptions used to define the geometries of the land patterns?
Many thanks for any light you may be able to cast on this,
John.
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