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Creating a stencil file without vias?

Former Member

 

Hi,

 

How do I create a stencil file which does not contain vias?  I have an

Eagle  Cad board  design.   I would  like  to process  a  cam file  to

generate an output stencil file.

 

Thanks for any suggestions.

 

marc

 

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Parents Reply Children
  • in reply to Richard_H

     

    >>>>> "Richard" == Richard Hammerl <ric@cadsoft.de> writes:

     

        Richard> Am 10.03.2011 07:37, schrieb Morten Leikvoll:

        >> Marc D Ronell <mronell@alumni.upenn.edu> wrote:

        >>> How do I create a stencil file which does not contain vias?  I

        >>> have an Eagle Cad board design.  I would like to process a cam

        >>> file to generate an output stencil file.

        >>

        >> There is a drc setting for a via diameter limit wich masks vias

        >> below the chosen diameter.

     

        Richard> Just as addendum: The limit value refers to the drill

        Richard> diameter of the via.

     

    If I run the  gerb274x.cam job and Add a job (tab)  with just the Pads

    layer  (17) and  the tCream  layer (31),  I get  a result  which looks

    reasonable in gerbv for a  potential stencil.  Does that approach seem

    reasonable?  Or does it miss something that I am not aware of yet?

     

    Thanks,

     

    Marc

     

     

    --

     

     

     

  • in reply to Former Member

    Marc D Ronell <mronell@alumni.upenn.edu> wrote:

     

    If I run the  gerb274x.cam job and Add a job (tab)  with just the Pads

    layer  (17) and  the tCream  layer (31),  I get  a result  which looks

    reasonable in gerbv for a  potential stencil.  Does that approach seem

    reasonable?  Or does it miss something that I am not aware of yet?

     

    That will plug all pins of through hole devices?