Actions
Forum Thread Details
  • Replies 2 replies
  • Subscribers 146 subscribers
  • Views 169 views
  • Users 0 members are here
Related

Making some heat sink to a so8 package on the board?

autodeskguest

Hello

 

I use a N-FET in a SO8 package, the package has 8 pin.

The symbol for the FET is a normally N-FET, 3 pin(D-S-G).

On the board layout I make some space on the top layer(layer_1) to put a

rect. The rect. just cover the SO8 package pin 1-3, and 4-8 is that the

way to do this?

 

Ask because the rect. not have option to connect to the NET. If I use a

poly. it wont short the pin on the SO8 package?

 

Any hints?

 

  • Hello

     

    Any hints?

     

    On 22-01-2010 08:46, Flemming wrote:

    Hello

     

    I use a N-FET in a SO8 package, the package has 8 pin.

    The symbol for the FET is a normally N-FET, 3 pin(D-S-G).

    On the board layout I make some space on the top layer(layer_1) to put a

    rect. The rect. just cover the SO8 package pin 1-3, and 4-8 is that the

    way to do this?

     

    Ask because the rect. not have option to connect to the NET. If I use a

    poly. it wont short the pin on the SO8 package?

     

    Any hints?

     

  • Flemming schrieb:

    Hello

     

    Any hints?

     

    On 22-01-2010 08:46, Flemming wrote:

    Hello

     

    I use a N-FET in a SO8 package, the package has 8 pin.

    The symbol for the FET is a normally N-FET, 3 pin(D-S-G).

    On the board layout I make some space on the top layer(layer_1) to put a

    rect. The rect. just cover the SO8 package pin 1-3, and 4-8 is that the

    way to do this?

     

    Ask because the rect. not have option to connect to the NET. If I use a

    poly. it wont short the pin on the SO8 package?

     

    Any hints?

     

    You can do it this way. You could also use the RECT or a Polygon in

    the library's package editor. The disadvantage is that DRC will report

    a clearance error because the rect or polygon is recognized as an

    object that does not belong to the covered pads. But you can approve

    this error in the DRC error list.

     

    If you want to have it without a DRC error you had to use 8 pins in the

    schematic and connect them with (D, S, G). So you could use a polygon

    with the correct signalname in the layout to connect pads 1-3 and 4-8.

     

     

    --

    Mit freundlichen Gruessen / Best regards

    Richard Hammerl

    CadSoft Support -- hotline@cadsoft.de

    FAQ: http://www.cadsoft.de/faq.htm