I want to write a ULP can cleansup board designs after the autorouter.
The first thing i want to solve is this problem:
You usually set the minimum width to the minimum of your board
manufacturer. nice for the router, but you endup with a very difficult
to produce design. i want to make a ULP that loops thrue all wires, and
makes them thicker, then runs a DRC to check for (new) errors.
Is this possible?