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EAGLE User Support (English) So close: Need help with Stop Mask errors !
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Related

So close: Need help with Stop Mask errors !

Former Member
Former Member over 15 years ago

Hello gang,

 

Thanks in advance for your excellent help!

 

I am soooo close to submitting my first PCB to BatchPCB, and am in a hurry

to get them back & built...

 

Following a tutorial on how to make my Gerber files, I found a DRU file for

SparkFun/BatchPCB which I loaded. Now I have fixed all my errors except the

78 that remain - Stop Mask errors.

 

They're on layers 29 & 30, so I turned the rest (except 20) off and

captured an image.

 

Look here:

 

http://www.logicunlimited.com/EaglePCB/v3_7-StopMaskErrors(78).jpg

 

I see the marked areas, but I don't know if there is a reason to be

concerned, or if I can simply ignore them all...

 

Can anybody please advise?

 

Do you need a better image (more layers showing, etc) in order to help??

 

Thanks, and happy Independence Day!

 

Sincerely,

 

Jack

image

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

 

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  • Former Member
    Former Member over 15 years ago

    "Jack Edin" <eagle@logicunlimited.com> wrote in message

    news:i0osui$m55$1@cheetah.cadsoft.de...

    Hello gang,

    >

    Thanks in advance for your excellent help!

    >

    I am soooo close to submitting my first PCB to BatchPCB, and am in a hurry

    to get them back & built...

    >

    Following a tutorial on how to make my Gerber files, I found a DRU file

    for

    SparkFun/BatchPCB which I loaded. Now I have fixed all my errors except

    the

    78 that remain - Stop Mask errors.

    >

    They're on layers 29 & 30, so I turned the rest (except 20) off and

    captured an image.

    >

    Look here:

    >

    http://www.logicunlimited.com/EaglePCB/v3_7-StopMaskErrors(78).jpg

    >

    I see the marked areas, but I don't know if there is a reason to be

    concerned, or if I can simply ignore them all...

    >

    Can anybody please advise?

    >

    Do you need a better image (more layers showing, etc) in order to help??

    >

    Thanks, and happy Independence Day!

    >

    Sincerely,

    >

    Jack

    image

    --

    Web access to CadSoft support forums at www.eaglecentral.ca.  Where the

    CadSoft EAGLE community meets.

     

    When I get these errors it is usually the silkscreen overlapping the stop

    mask. If this is the case, I usually ignore them.

     

    Isn't  Independence Day a old movie about aliens?

     

    regards

     

     

     

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  • Former Member
    Former Member over 15 years ago in reply to Former Member

    Correct!

     

    Actually the silkscreen >Names & >Values caused this, and they were near

    by, not overlapping.

     

    I fixed them all, except 9...

     

    These are effected by the item's own footprint!

     

    The device is a 2-row header, at 90-degrees.

     

    Part Package is: 2X03/90.

    The Device is:   PINHD-2X3/90 (PINHD-2x3).

    The Library is:  PINHEAD.

     

    The trouble is on Layers tDOCU (3 of 'em) & tPLACE (6 of 'em).

     

    I believe I can ignore all except the tDOCU 3 as they actually cover the

    pads!

     

    I had a similar issue with my vertically mounted Diodes. To fix them I

    edited the offending portion manually into a separate library, deleted them

    from the schematic, then added 'em back in. This turned out to cause alot

    of pain because the wires were deleted off the board in the process. I not

    only had to reposition the footprints, but redraw the routes too!!

     

    No way I want this to happen again!

     

    Can I hope/assume that when I make my Gerbers the tDOCU layer can be

    ignored??

     

    Thanks, again...

     

    Jack

    image

     

    --

    Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

     

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  • Former Member
    Former Member over 15 years ago in reply to Former Member

    "Jack Edin" <eagle@logicunlimited.com> wrote in message

    news:i0qahr$368$1@cheetah.cadsoft.de...

    Correct!

    >

    Actually the silkscreen >Names & >Values caused this, and they were near

    by, not overlapping.

    >

    I fixed them all, except 9...

    >

    These are effected by the item's own footprint!

    >

    The device is a 2-row header, at 90-degrees.

    >

    Part Package is: 2X03/90.

    The Device is:   PINHD-2X3/90 (PINHD-2x3).

    The Library is:  PINHEAD.

    >

    The trouble is on Layers tDOCU (3 of 'em) & tPLACE (6 of 'em).

    >

    I believe I can ignore all except the tDOCU 3 as they actually cover the

    pads!

    >

    I had a similar issue with my vertically mounted Diodes. To fix them I

    edited the offending portion manually into a separate library, deleted

    them

    from the schematic, then added 'em back in. This turned out to cause alot

    of pain because the wires were deleted off the board in the process. I not

    only had to reposition the footprints, but redraw the routes too!!

    >

    No way I want this to happen again!

    >

    Can I hope/assume that when I make my Gerbers the tDOCU layer can be

    ignored??

    >

    Thanks, again...

    >

    Jack

    image

    >

     

    Yes, you would not normally include tDOCU in your gerbers.

     

    Also, the size of the stop masks vary depending on setting in your DRC, so

    if you change DRC you may get your errors back. I would turn tDOCU off

    before you do a DRC.

     

     

     

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  • Former Member
    Former Member over 15 years ago in reply to Former Member

    New issue!

     

    I just uploaded my Gerber files to BatchPCB, and that right angle HD Header is causing a new problem, and expense...

     

    Because the part is shown hanging off the board, they are counting the silk screen layer's image of the header's pins as part of the board. And charging for them!

     

    So the board which is really 1" x 3" and should cost $7.50 (3 sq in times $2.50/sq in) is now $8.11 because it is 3.24 sq in.

     

    What a be-atch!!

     

    The header must protrude it's male pins to connect externallly for programming.

     

    I just thought that as they are outside the board's outline, they would not be counted and that BatchPCB would chop 'em off!

     

    Hmmm....

     

    The outline was included in the Top Copper layer. I have the option of making a seperate outline layer. Anybody think it would help?

     

    Help!

     

    Thanks.

     

    Sincerely,

     

    Jack

    image

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  • Former Member
    Former Member over 15 years ago in reply to Former Member

    Jack Edin:

     

    Because the part is shown hanging off the board, they are counting the silk screen layer's image of the header's pins as part of the board. And charging for them!

     

    Never heard of anythig similar.

     

    The outline was included in the Top Copper layer.

     

    Uh?

     

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  • Former Member
    Former Member over 15 years ago in reply to Former Member

    On 7/4/2010 11:33 PM, Jack Edin wrote:

    New issue!

    >

    I just uploaded my Gerber files to BatchPCB, and that right angle HD Header is causing a new problem, and expense...

    >

    Because the part is shown hanging off the board, they are counting the silk screen layer's image of the header's pins as part of the board. And charging for them!

    >

    So the board which is really 1" x 3" and should cost $7.50 (3 sq in times $2.50/sq in) is now $8.11 because it is 3.24 sq in.

    >

    What a be-atch!!

    >

    The header must protrude it's male pins to connect externallly for programming.

    >

    I just thought that as they are outside the board's outline, they would not be counted and that BatchPCB would chop 'em off!

    >

    Hmmm....

    >

    The outline was included in the Top Copper layer. I have the option of making a seperate outline layer. Anybody think it would help?

    >

    Help!

    >

    Thanks.

    >

    Sincerely,

    >

    Jack

    image

    >

     

    Hi Jack,

     

    What you should do is find out what layer the drawing of the header is

    on. If it's on one of the gerber layers then change it so that the

    drawing of the header isn't outputted with the Gebers.

     

    That way the batchPCB bot won't even see the header, just the pads at

    which point your board outline will dominate and you will be charged the

    appropriate amount of $7.50.

     

    hth,

     

    Jorge Garcia

    Cadsoft Computer

     

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