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Autodesk EAGLE
EAGLE User Support (English) Possible polygon bug?
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Related

Possible polygon bug?

e14 Contributor
e14 Contributor over 14 years ago

Hi,

 

I have recently upgraded to Eagle 6.0.0 from Eagle 5.11 (both

professional, Win7/64) and have noticed some oddness with polygons in

one of my projects.

 

I've made a copy of the .brd, deleting all irrelevant components, in

order to show this.  The layout is attached along with a picture of the

problem.

 

The problem is this:  I have a "docfield" component of my own which

features text on various layers to identify printouts when they are

produced, e.g. "Top Layer", "Assembly Guide" and so on.

 

It seems that, when RATSNESTing, the polygon processor believes this

component to be located at the origin (and it's obviously not - you can

see its origin and the board origin in the picture) and avoids filling

the area where there is, in fact, no bottom- or top-layer text.

 

There is no errant tRestrict/bRestrict text causing this.

 

The missing area is only shown in the PCB layout editor -- exporting CAM

data (I've tried EPS) shows that the polygon is fine.

 

Any thoughts?

 

 

Andrew

0xADF

 

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  • e14 Contributor
    e14 Contributor over 14 years ago

    On 15/12/2011 16:17 in eagle.betatest, Walter Spermann wrote:

    A new beta version of EAGLE is now available for download.

    ...

      - Fixed subtracting texts with vector font from polygons if placed in packages.

     

    Thanks.  v6.0.1 has fixed my problem.

     

     

    Andrew

    0xADF

     

     

     

    On 13/12/2011 10:11, Andrew Feldhaus wrote:

    Hi,

     

    I have recently upgraded to Eagle 6.0.0 from Eagle 5.11 (both

    professional, Win7/64) and have noticed some oddness with polygons in

    one of my projects.

     

    I've made a copy of the .brd, deleting all irrelevant components, in

    order to show this. The layout is attached along with a picture of the

    problem.

     

    The problem is this: I have a "docfield" component of my own which

    features text on various layers to identify printouts when they are

    produced, e.g. "Top Layer", "Assembly Guide" and so on.

     

    It seems that, when RATSNESTing, the polygon processor believes this

    component to be located at the origin (and it's obviously not - you can

    see its origin and the board origin in the picture) and avoids filling

    the area where there is, in fact, no bottom- or top-layer text.

     

    There is no errant tRestrict/bRestrict text causing this.

     

    The missing area is only shown in the PCB layout editor -- exporting CAM

    data (I've tried EPS) shows that the polygon is fine.

     

    Any thoughts?

     

    >

    Andrew

    0xADF

     

     

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