Actions
Forum Thread Details
  • Replies 9 replies
  • Subscribers 188 subscribers
  • Views 860 views
  • Users 0 members are here
Related

polygons and component pads

e14 Contributor

I frequently like to use polygons to expand the heatsink (tab area) on

parts such as D2PAK's.  Even with with isolate set to 0 and the tab

connected to the same net, there is still a small gap there.  I then go

back with a trace to manually fill in the gap.  Is there a better way to

do this?

 

Thanks

 

Parents

  • Hi John

     

    There should be no problem achieving what you desire without the need to

    fill the gap, if done correctly.

     

    A little short of information in your post.

     

    Which Eagle version are you using?

    Is your D2PAK a package you created or one from an Eagle library, so we can

    check how the package is constructed?

    i.e. Is the tab in the library package made from a single SMD pad  or a

    polygon with or without a smaller SMD pad?

     

    While DRC is interpreted as Design Rule Check it does dynamically modify

    the board design, in real time.

     

    The image attached shows the two situations where the signal name and the

    polygon name are the same or different.

    --

    Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

     

  • in reply to e14 Contributor

    On 2/29/2012 3:31 PM, Warren Brayshaw wrote:

    Hi John

     

    There should be no problem achieving what you desire without the need to

    fill the gap, if done correctly.

     

    A little short of information in your post.

     

    Which Eagle version are you using?

    Is your D2PAK a package you created or one from an Eagle library, so we can

    check how the package is constructed?

    i.e. Is the tab in the library package made from a single SMD pad  or a

    polygon with or without a smaller SMD pad?

     

    While DRC is interpreted as Design Rule Check it does dynamically modify

    the board design, in real time.

     

    The image attached shows the two situations where the signal name and the

    polygon name are the same or different.

     

    Forgot to say I am using Eagle 5.12.0

     

Reply
  • in reply to e14 Contributor

    On 2/29/2012 3:31 PM, Warren Brayshaw wrote:

    Hi John

     

    There should be no problem achieving what you desire without the need to

    fill the gap, if done correctly.

     

    A little short of information in your post.

     

    Which Eagle version are you using?

    Is your D2PAK a package you created or one from an Eagle library, so we can

    check how the package is constructed?

    i.e. Is the tab in the library package made from a single SMD pad  or a

    polygon with or without a smaller SMD pad?

     

    While DRC is interpreted as Design Rule Check it does dynamically modify

    the board design, in real time.

     

    The image attached shows the two situations where the signal name and the

    polygon name are the same or different.

     

    Forgot to say I am using Eagle 5.12.0

     

Children
No Data