Hi,
I made a custom footprint for an SMD connector I'm using. I wanted to build vias into the footprint for each pad and to connect a trace from each pad to its via. The reason I want to do this is so that I don't need to re-do that routing effort in every component that I place (there are a bunch), and since I know I want to route the signals from the connector on a buried layer. When I defined the device that uses the footprint, I simply did not "connect" the SMD pads and associated the schematic signal pins with the aforementioned vias.
I made the library part without a problem, but now that I'm going to use it, I am getting lots and lots of DRC errors. These are all related to Clearance between vias, traces, and SMD pads in the library component, and Overlap between my vias and pads and the library traces, without even routing anything. Furthermore, when I actually do route a signal to one of the vias by way of the SMD pad, I get Overlap lape errors where my trace runs through the SMD pad to get to the library connected via. So my question is, how do I define my library part correctly so as to avoid these fictional DRC errors?
Cheers,
Vic
