Vias Size Layout / DRC / Board house capabilities / Differential Pairs

Phil Lorenz wrote:

A few questions:

 

Considering this board house / capabilities: Circuits West  -

http://www.circuitswest.com/capabilities *Trace/Space and Drilling

Information* * .003”line and space Capability

• Drilling with .010” bits for .007” hole size for .062” PCB’s

• High Aspect Ratio of 10:1.

 

 

1)  Trace width minimum/object spacing minimum is 3mils.  This is working

fine in Eagle

I highly recommend paying extra for a full electrical netlist check on a

board with spacing that fine, as copper shorts are quite likely. Depending

on how many boards the house has to scrap due to shorts, expect the cost to

rise substantially as well. You also have to pay close attention to current

capacity with traces that fine. FYI.

2)  I have a request for info into the board house, but I

believe that 7mil holes is minimum according to the above.  When I place a

via the hole plating/pad looks like it has a minimum "thickness" of 10mils

(edge of hole inner radius to edge of copper outer radius).  I'm not sure

what to make of this.  Can eagle do smaller plating thickness?  Where is

this setting?

You need to look in DRC (the design rule check icon) for the min restring

and adjust that parameter accordingly. See Help->Design Rules.

3) How do I utilize/make micro-vias?

You have to use the right layer stack-up description. Again, see Help-

>Design Rules.

4)  Given the above

capabilities.  What additional questions do I need to ask the board house

to successfully layout a board.

See above about electrical rule check, and below.

5)  I'm drawing in 50-Ohm (100 ohm

differential) differential pair traces.  Anyone with experience with this

and eagle that has suggestions/pointers/resources would be greatly

appreciated!

 

There are plenty of online calculators for calculating the impedence of

external or internal differential pair traces. The only thing you directly

control is the distance between the traces, how wide they are, and where

they are in relation to the ground plane (if any). However, they also

require knowledge of the dielectric of the laminate (typically for ER-4, but

other laminates are available for RF), the thickness of the copper, and the

thickness of the prepegs in the PCB stackup. All of these require

interfacing with the board house to get the necessary information, as well

as what impedence testing gear they have, what kind of test coupons they may

want, etc. etc. The tighter the tolerance you need, the more interfacing you

will have to do, and the more money you will be paying.

That said, I've only done one controlled impedence board to date, so others

on this forum might have more to add, or corrections to make.

Thanks in advance for the help!  It's been 10 years since i've done any

layout and I've never used Eagle to put things in perspective.