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Adding vias in a copper polygon

StefanTh

Hi

 

I have routed my pcb with Router and everything looks fine.

 

I want to add a heatsinker to some of the pins of a IC by creating a polygon of copper on each side of the PCB close to the IC pin.

I connect these polygons with a number of vias and attach the vias to the IC pin by givign the the vias and copper polygon the

same net name as the IC pin

 

However the Drc command generate a "drill error" for each of the via's.

 

 

1) Create a polygon in copper on both side of the PCB

2) Place a number of vias inside this polygon of copper

3) Set the Net class name of the vias and copper polygon to the same net class name as the pin

4) Run "Drc"

 

It seems that the copper polygon's have painted copper over the whole of the vias and therefore the error is reported.

 

How do I avoid this error message ?

Why do the copper polygon paint over the vias ?

Should I instead set the via's at the edge of the copper polygon or is there other ways of doing it ?

 

Regards

  • On 10/24/2012 03:00 AM, Stefan Olsson wrote:

    Hi

     

    I have routed my pcb with Router and everything looks fine.

     

    I want to add a heatsinker to some of the pins of a IC by creating a polygon of copper on each side of the PCB close to the IC pin.

    I connect these polygons with a number of vias and attach the vias to the IC pin by givign the the vias and copper polygon the

    same net name as the IC pin

     

    However the Drc command generate a "drill error" for each of the via's.

     

    Drill errors are usually caused by drill holes being too close to each

    other.  Check the distance settings in your DRC.  You may also want to

    try to move a via to determine if multiple vias are co-located.

     

    Try posting your test board here.  I'll take a quick look at it.

     

    Best regards,

        - Chuck

     

     

  • in reply to dukepro

    Hi

     

     

    I do not know how to attach a .brd file so I insert a number of screen shoots instead

     

     

    image

     

     

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    Regards

  • in reply to StefanTh

    Good morning, Stefan,

     

    The screenshots didn't make it into the message.

     

        - Chuck

     

    On 10/25/2012 01:58 AM, Stefan Olsson wrote:

    Hi

     

    >

    I do not know how to attach a .brd file so I insert a number of screen shoots instead

     

    >

    Image:testboard.png

     

    >

    Image:testboard2.png

     

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    Image:testboard3.png

     

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    Image:testboard4.png

     

    Image:testboard5.png

     

    Image:testboard6.png

     

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    Regards

     

     

     

  • in reply to dukepro

    Chuck Huber wrote on Thu, 25 October 2012 07:32

    The screenshots didn't make it into the message.

     

    Actually they did make it just fine.  The message was posted over at the

    official Element-14 Eagle forum.  The images didn't make it to the NNTP

    feed and therefore the Eagle Central forums, which only display the NNTP

    content.

    --

    Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

     

  • in reply to Former Member

    Hi

     

    Did you find anything that would explain why the copper layers do not connect to the vias but instead "put itself" over the via holes and

    the nthe DRC complain that the "drill size" is wrong ?

     

     

    Regards Stefan

  • in reply to StefanTh

    This have been solved, it seems that EAGLE change the drill hole size when you create polygons.

     

    The solution is to use properties on an existing via and copy the drill size of that via and use the drill size on the manually placed vias

  • Hi,

     

    *******How do I avoid this error message ?

    In the DRC/Sizes tab there is a Mininum Size option, usually the default value is set to 24 mil.  Its possible the last drill size you used was bellow this value, for then, the vias as using a drill size value below 24 mil.  This will cause DRC to generate a Drill Layer.

    Make sure you have not place 2 vias on top of each other.

     

    *******Why do the copper polygon paint over the vias ?

    By Defaul Vias have the Thermal option disabled, it is not expected for vias to have anything soldered to them, for then, heat doesn't need to build.   If you would like vias to have Thermals, go to DRC/SUPPLY tab and enable the Thermal option.

     

     

    *******Should I instead set the via's at the edge of the copper polygon or is there other ways of doing it ?

    This is a matter of preference, but it is not necessary.  After enabling the Thermal option for vias in the DRC option, you may change the option for each via individually.

     

    I hope this helps.

    Best Regards,

    Ed