I have four VIAs (named VSS and are "Thermal" VIAs from Layers 1 to 16) which are positioned through two SMD pads on Layers 1 and 16 (sized for an Exposed (Thermal) Pad). The device pins associated with the pads are connected to VSS. It's a four-layer board and Layer 2 is a VSS polygon. The copper layers (1,2,16) all show connection, but I'm getting two "air wires" ("not routed" indications): one between the SMD pads (the big X) and one from one of the SMD Pads and the VIA that penetrates it.
I've attached images of the Board showing the yellow (unrouted) issue and the "Info" for one of the VIAs.
Here is the XML from the Board file showing the Polygon, the connections, the VIAs, and the Unrouted (Layer 19) complaints:
<signal name="VSS">
...
<polygon width="0.254" layer="2" isolate="0.3048">
<vertex x="0" y="45.72"/>
<vertex x="35.56" y="45.72"/>
<vertex x="35.56" y="0"/>
<vertex x="0" y="0"/>
<polygon>
<contactref element="IC1" pad="0"/>
<contactref element="IC1" pad="65"/>
<via x="23.368" y="21.844" extent="1-16" drill="0.5"/>
<via x="23.368" y="19.304" extent="1-16" drill="0.5"/>
<via x="25.908" y="21.844" extent="1-16" drill="0.5"/>
<via x="25.908" y="19.304" extent="1-16" drill="0.5"/>
<wire x1="24.638" y1="20.574" x2="24.638" y2="20.574" width="0" layer="19" extent="1-16"/>
<wire x1="23.368" y1="19.304" x2="24.638" y2="20.574" width="0" layer="19" extent="1-1"/>
...
<signal>
Pad 0 is the Exposed Pad on the Component side and Pad 65 is the same on the Solder side. It's a QFN64, 9mm X 9mm, 0.5 mm pitch with an Exposed Pad.
I've seen this problem occasionally before and I vaguely recall re-ordering the sequence of connection and/or placing the VIA and/or naming the VIA and/or <something else>. made the problem go away.
Is there any secret handshake or chant needed? What is the recommended sequence?
Thanks,
GlennP
Edit 1: Removed "and des" in first parenthetical. Was going to say the VIAs were from layers 1-16.
Edit 2: Added 'to' to Title.
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