I'm using a 2 Layer Board in Eagle .
The datasheet gives some info about the layout, advising me to add some vias inside that Pad for heatsink problems.
I have opened Eagle tutorial "ti-launchpad" where there are 2 IC with Pads and vias on them (how in the image)p .
Watching the DRC I have some overlap errors.
I can follow that way in order to design my board but I wonder if it's the right way to do this or not !
I have also seen someone to put arrays of pads instead of vias in order to get this!
Hope you can put me in the right direction!
Thanks a lot
Nico