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LT3759 exposed Pad

nikoly

I'm using a 2 Layer Board in Eagle .

The datasheet gives some info about the layout, advising me to add some  vias inside that Pad for heatsink problems.

I have opened Eagle tutorial "ti-launchpad" where there are  2 IC with Pads and vias on them (how in the image)p .image

Watching the DRC I have some overlap errors.

I can follow that way in order to design my board but I wonder if it's the right way to do this or not !

I have also seen someone to put arrays of pads instead of vias in order to get this!

 

Hope you can put me in the right direction!

Thanks a lot

Nico

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  • 0

    Hi and thanks again.

    Now I have some points more clear.

    So  if I decide to hand solder I should put the thermal structure through the all  board (like some people on you tube make) .

    Which is the best way to do this in Eagle cad?

    How can do this ? in the package editor or in the PCB  layout?

    Could you please suggest an example?

    Thanks a lot

     

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  • 0

    Hi and thanks again.

    Now I have some points more clear.

    So  if I decide to hand solder I should put the thermal structure through the all  board (like some people on you tube make) .

    Which is the best way to do this in Eagle cad?

    How can do this ? in the package editor or in the PCB  layout?

    Could you please suggest an example?

    Thanks a lot

     

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  • 0 in reply to nikoly

    nikk kik wrote:

     

    Which is the best way to do this in Eagle cad?

    How can do this ? in the package editor or in the PCB  layout?

     

    Hi Nico,

     

    This is basically as we discussed initially, so you start by creating the package with the thermal pad defined correctly as per the datasheet, this ensures the solder mask and paste mask are defined correctly so it doesn't move to the wrong place when the solder paste underneath it reflows.

     

    Then you have a couple of choices:

     

    You could add additional polygons top and bottom side in the board and add the vias between them. Just name the polygons and vias the same as the net the thermal pad connect to which I think in your case will be GND.

     

    Alternatively you could build the polygons and into the library part. This has the advantage that they'll appear automatically on all parts placed but the disadvantage is that you'll not be able to alter/remove them if they are in the way anywhere without editing the library part again. You then put the via's between the two in the board as previously or I think you could do it using correctly sized TH pads placed within the polygons. You'd need to ensure they were all connected to the same pin as the thermal pad. This method may throw up a bunch of DRC errors but I am not sure as I haven't tried it this way myself, I always just do all this in the board as I find it quite easy.

     

    With either of these options it may be worth putting a small polygon on the bottom solder mask layer inside the bottom side heatsink polygon to leave a small area of copper exposed so your soldering iron makes a good thermal contact with the copper to help get the heat up through to reflow the thermal pad more quickly.

     

    Best Regards,

     

    Rachael

     

    EDIT: Added comment about on bottom side solder mask.