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How do you add a decoupling cap to a 32KB RAM?

prefontdon

Eagle v9.1.3 Standard

IC  CY62256NLL-70PXCCY62256NLL-70PXC

Library: memory-sram  Static RAMS (urn:adsk.eagle:library:278)

Sub-library: CY62256LL-?*

Item: CY62256LL-PXC   DIL28-6

 

The Symbol shows one object for the chip and two other devices that are VCC and GND. They seem to be categorized as P in the Symbol drawing, obviously for Power.

 

Here's the question: how do I put a decoupling cap on schematic for the IC if the power pins only show on the board?

 

Thanks,

 

Don

 

P.S.  Is there an easier/faster way to add antispike/decoupling caps to ICs in the schematic? Has anyone done a video on this?

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  • 0

    I assume you place the capacitor between the two power pins (14 and 28) on the schematic. Have you tried this? That should then show up to be routed on the board.

  • 0

    Don,

     

    After placing the RAM device on the schematic, move to the side tool bar and select 'Invoke' and left click on the RAM device.  This will pop-up a menu that will allow you to select and place the 'P' part containing the power pins onto the schematic.

    Then you can connect the power to part and place bypass caps.

     

    Back in the old days, a lot of schematics would place all of the bypass caps on a separate page.  I guess you could do something like this, place all of the caps together in a 'power supply' section, then when placing parts in the layout, just move the bypass caps where you want them.  I like having the caps on the schematic right near the parts, so I know that I have them in the right spots.

     

    Good luck!

    Gene

  • 0 in reply to genebren

    On 20/09/18 15:36, Gene Breniman wrote:

    Don,

     

    After placing the RAM device on the schematic, move to the side tool bar and select 'Invoke' and left click on the RAM device.  This will pop-up a menu that will allow you to select and place the 'P' part containing the power pins onto the schematic.

     

    One small addition to Gene's excellent answer:

     

    The reason library is set so that the P "gate" isn't shown immediately

    is that Eagle treats pins with "direction" set to "pwr" or "sup"

    specially. If not explicitly shown otherwise, they make automatic

    connections to a net with the same name as the pin. If your circuit has

    only one power supply, e.g. VCC & GND, and if all your components use

    those same supply names in their P gate, then you don't need to clutter

    the diagram with power connections.

     

    If you take that approach, you can still add decoupling capacitors by

    placing them anywhere on the schematic between explicit supply symbols

    for the power rails you're using. The nets will automatically connect by

    name.

     

    Most people these days prefer to make this explicit, using the "invoke"

    method Gene explained. If you're using a non-free version, you can still

    declutter the main schematic by having a separate sheet dedicated to all

    the power gates and decoupling, if that's your preference.