DRC clearance error

On 05/11/2019 17:41, Nav Khan wrote:

I am using a library for MCP73871 battery controller. I tried two different librarys but I get the same clearance error as shown in the picture. This is qfn package where the centre is the exposed pad and is grounded.

Changing DRC clearance does not get rid of the error. Is it a faulty library or am i doing something wrong ... MANY THANKS

 

There are two separate issues here.

First, the four thermal vias in the centre pad are misaligned such that

one of them is practically touching pin 13. You need to re-centre them.

They're also not being recognised as ground vias, by the look of it,

although the airwires suggest they are correctly named. Which version of

Eagle are you using? I think the rules changed at some point.

Second, you've got pad-to-pad clearance settings in your DRC rules that

don't allow for this footprint. I'm not familiar with the device in

question so I can't say whether the centre pad really needs to be as

large as it is, or whether you need a board house that can manage very

small clearances.

In practice, even if those clearances are OK for manufacture, you may

well need to adjust (or remove and hand-craft) the automatic solder mask

on all the pads of a device like that.

On 05/11/2019 17:41, Nav Khan wrote:

I am using a library for MCP73871 battery controller. I tried two different librarys but I get the same clearance error as shown in the picture. This is qfn package where the centre is the exposed pad and is grounded.

Changing DRC clearance does not get rid of the error. Is it a faulty library or am i doing something wrong ... MANY THANKS

 

There are two separate issues here.

First, the four thermal vias in the centre pad are misaligned such that

one of them is practically touching pin 13. You need to re-centre them.

They're also not being recognised as ground vias, by the look of it,

although the airwires suggest they are correctly named. Which version of

Eagle are you using? I think the rules changed at some point.

Second, you've got pad-to-pad clearance settings in your DRC rules that

don't allow for this footprint. I'm not familiar with the device in

question so I can't say whether the centre pad really needs to be as

large as it is, or whether you need a board house that can manage very

small clearances.

In practice, even if those clearances are OK for manufacture, you may

well need to adjust (or remove and hand-craft) the automatic solder mask

on all the pads of a device like that.

Hi Thanks for the response.

The vias are non issue as I just added them to check if that would help in the clearance. So the clearance issue is still there even without the vias. I am new to this and this is my first design, I was really under the impression that the librarys available online are accurate. The manufacturing view of the device shows the central pad so large that it is touching the other surrounding pads. I should get down to designing my library...Thanks again