optimizing line routing, transmission lines, reflections

Jon Fick wrote:

All,

 

A search of the subject lines of the last several thousand posts in this

newsgroup didn't reveal an answer to my question, nor did searchs in

Google...

 

I commonly use the Eagle Autorouter to avoid routing by hand.  (I know

there are a variety of opinions on this!)  I'm a middle of the road

type...where in certain situations I'll either do the layout of certain

transmission lines prior to the autorouter, or modify routing after the

autorouter is done.  I'm wondering if some of the Eagle "power users"

might post a few references (online, printed, etc.) that would

illustrate how to optimize the layout of transmission lines, for

instance for feeding multiple I2C devices.  Daisy chain?  Star layout?

Everything I've found online is essentially yet another "transmission

line calculator" but there's nothing about actual routing design.

 

Thanks for any references or pointers.

 

Jon Fick

Transmission lines should be routed in a daisy chain fashion.  Stubs can

cause problems, depending on the data rates and the signal's rise and

fall times.  Terminators must be mounted at the end of the transmission

line.  I've just looked up the signaling rate for I2C and found that

it's between 100Kbps and 400Kbps.  So layouts 1 and 2 should work just

  fine.

1) GOOD - daisy chain:

      [chip]//[chip]--[term]

    Note that for really high speeds (Gbps), the terminating resistor is

often built into the chip.

2) Not so Good / Not so bad - termination resistors should be after the

connection to the end chip.  However, if the terminator is very close to

the chip's pin, this will probably work.  For I2C speeds, this layout

should work.

     +[chip]//+--[chip]

3) BAD - this layout has stubs.  If the stubs are long compared to the

rise/fall time of the signal you will get reflections, and this will

most likely cause grief.

            +//--

      long trace==> |              |

      (AKA "stub")  |              | <== stub

                     |

HTH

-Dave Pollum

Jon Fick wrote:

All,

 

A search of the subject lines of the last several thousand posts in

this newsgroup didn't reveal an answer to my question, nor did

searchs in Google...

 

I commonly use the Eagle Autorouter to avoid routing by hand.  (I know

there are a variety of opinions on this!)  I'm a middle of the road

type...where in certain situations I'll either do the layout of

certain transmission lines prior to the autorouter, or modify routing

after the autorouter is done.  I'm wondering if some of the Eagle

"power users" might post a few references (online, printed, etc.)

that would illustrate how to optimize the layout of transmission

lines, for instance for feeding multiple I2C devices.  Daisy chain? Star

layout? Everything I've found online is essentially yet another

"transmission line calculator" but there's nothing about actual

routing design.

Thanks for any references or pointers.

 

Jon Fick

Well, I'm kind of afraid to stick my neck out, since there will undoubtedly

be varying heated opinions on this, but here goes anyway.... (why am I not

doing my own work instead?)

How fast is your I2C bus?  As another reply suggested, typical maximum

speeds are 100KHz and 400KHz.  That is really s-l-o-w!  There isn't a PCB on

earth big enough to have tracks anywhere near 1/10th the propagation time of

one bit at that speed.  In that light, it doesn't matter in the least how

you route these signals (although you might want to keep them away from

anything noisy on the board).

However, you should also look at signal rise and fall times.  That's

probably quite a bit more difficult to quantify, since the specs tend to

give you maximum rather than minimum rise/fall times.

As an example, let me look at the Microchip 24LC32A EEPROM, which happens to

be in a design I'm working on right now.  It specs a maximum "Input Filter

Spike Suppression" time of 50ns, meaning that the SCL and SDA lines can

"glitch" for up to 50ns and be completely ignored by the EEPROM.  If you

take that 50ns as a propagation time, you'll need about 33 feet of track.

Allowing for a couple of reflections between the ends of the track, you

could still have 10 feet of track length without exceeding the 50ns glitch

time.  Not many boards will have a problem keeping the I2C track lengths

under 10 feet. 

Of course, your I2C devices may not have such handy glitch specs.  I also

have a DS1307 real time clock chip.  It doesn't seem to spec anything about

glitches.  However, it only runs up to 100KHz, and I suspect it won't take

much notice of 50ns glitches either.  But I don't really know.  So I will

certainly be keeping my I2C lines as short as reasonably possible.

Note that all this thinking about "transmission lines" doesn't do you much

good on an I2C bus, since you can't terminate it.  Even if you run your I2C

lines neatly over a continuous ground plane and figure out just what their

impedance turns out to be, you'll still get enormous reflections at the open

ends.  The pull-up resistors are generally several K-ohms, and might as well

be open-circuits for all the termination good they'll do.

So, I say keep your I2C lines as short as reasonably possible, and then

don't worry about them unless they're running unusually fast or the PCB is

too big to fit in your car.

Now on with the day's work.

--

Bert Menkveld

Bert, David,

Thanks very much for the time you took to pen the detailed replies about

transmission line routing.  Very helpful.

Jon