Wire list from board

Hi,

    I wrote a "WIRELIST.ulp" and submitted it to the Eagle ULP library (see

near the end of the ulp list).

It does exactly what you need, and a bit more.

    I needed a BRD file,  "post processor",  after an Eagle board is

populated, to create an "optimized wire length point to point wire wrap

list" - so I could test a project using a prototype project board, before

committing to a PCB.

The wire lengths are scanned and optimized. The resulting TXT file contains

NET names (based on the signal name), the name of the component, the pad/pin

number and its XY board coordinate, and point to point length of wire.

    You can even graphically display the wrapped wire runs on the BRD, just

like a routed PCB air wire display.

The TXT file header will also contain the "date and time of the run", just

to keep track of and distinguish parts placement changes, that occur during

iterations of the project during development.

    There is an extensive description and user guide in the ULP comments

header.

Since I wrote it in an intensive session over two years ago, for Eagle rev

4.15, I really don't recall all the details, but it is fully debugged, and

fully documented.

Hope this helps.

Joe

    Here is a "sample output" section  (ALTAZ-JAZ-24C.txt),  of one of my

normal Eagle  BRD projects:

If one would wire the project in this exact sequence, it would use the least

amount of wire, and therefore shortest point-to-point signal run.

*************************************************************

EAGLE Version 4.15 Copyright (c) 1988-2005 CadSoft

J.A.Z. - Netlist with pin locations exported

from C:/Documents and Settings/Joe/My Documents/EAGLE PROJECTS/DUAL

AXIS/ALTAZ-JAZ-24C.brd at 01/09/2005 02:01:01a

Net        Part     Pad              x                         y

Wire Length (mil)

+POS     R12        1      3750.000000     3950.000000       0.000000

               J9J1       1      3951.000000     3950.000000     201.000000

-NEG     NN3       3     4050.000000     3600.000000       0.000000

              J9J1        2      4149.000000     3950.000000     363.732044

0.5X     JP6         8       4050.000000      1950.000000       0.000000

             IC19       1      4650.000000      1050.000000    1081.665383

             IC19       2      4750.000000      1050.000000     100.000000

             IC27      12     5650.000000      1550.000000    1029.563014

             IC27       8      6050.000000      1550.000000     400.000000

1.5X     JP6         6      3950.000000      1950.000000       0.000000

             IC30       5      4150.000000      2050.000000     223.606798

             IC19      13     4950.000000      1350.000000    1063.014581

             IC19      12     5050.000000     1350.000000     100.000000

***************************************************************************

"gregrycm" <gregrycm@insightbb.com> wrote in message

news:fvgmr6$2h0$1@cheetah.cadsoft.de...

Hello,

 

I have a board layout, and want to create a ASCII file that lists all the

net names and components that make up each net.

 

I have tried to Export a Netlist from the board, but only get the

following:

 

Netlist

Exported from 8051-3PORT.brd at  5/02/2008 10:21:39p

EAGLE Version 4.16r2 Copyright (c) 1988-2006 CadSoft

Net      Part     Pad

 

 

 

Thanks,

Greg

 

Hi,

    I wrote a "WIRELIST.ulp" and submitted it to the Eagle ULP library (see

near the end of the ulp list).

It does exactly what you need, and a bit more.

    I needed a BRD file,  "post processor",  after an Eagle board is

populated, to create an "optimized wire length point to point wire wrap

list" - so I could test a project using a prototype project board, before

committing to a PCB.

The wire lengths are scanned and optimized. The resulting TXT file contains

NET names (based on the signal name), the name of the component, the pad/pin

number and its XY board coordinate, and point to point length of wire.

    You can even graphically display the wrapped wire runs on the BRD, just

like a routed PCB air wire display.

The TXT file header will also contain the "date and time of the run", just

to keep track of and distinguish parts placement changes, that occur during

iterations of the project during development.

    There is an extensive description and user guide in the ULP comments

header.

Since I wrote it in an intensive session over two years ago, for Eagle rev

4.15, I really don't recall all the details, but it is fully debugged, and

fully documented.

Hope this helps.

Joe

    Here is a "sample output" section  (ALTAZ-JAZ-24C.txt),  of one of my

normal Eagle  BRD projects:

If one would wire the project in this exact sequence, it would use the least

amount of wire, and therefore shortest point-to-point signal run.

*************************************************************

EAGLE Version 4.15 Copyright (c) 1988-2005 CadSoft

J.A.Z. - Netlist with pin locations exported

from C:/Documents and Settings/Joe/My Documents/EAGLE PROJECTS/DUAL

AXIS/ALTAZ-JAZ-24C.brd at 01/09/2005 02:01:01a

Net        Part     Pad              x                         y

Wire Length (mil)

+POS     R12        1      3750.000000     3950.000000       0.000000

               J9J1       1      3951.000000     3950.000000     201.000000

-NEG     NN3       3     4050.000000     3600.000000       0.000000

              J9J1        2      4149.000000     3950.000000     363.732044

0.5X     JP6         8       4050.000000      1950.000000       0.000000

             IC19       1      4650.000000      1050.000000    1081.665383

             IC19       2      4750.000000      1050.000000     100.000000

             IC27      12     5650.000000      1550.000000    1029.563014

             IC27       8      6050.000000      1550.000000     400.000000

1.5X     JP6         6      3950.000000      1950.000000       0.000000

             IC30       5      4150.000000      2050.000000     223.606798

             IC19      13     4950.000000      1350.000000    1063.014581

             IC19      12     5050.000000     1350.000000     100.000000

***************************************************************************

"gregrycm" <gregrycm@insightbb.com> wrote in message

news:fvgmr6$2h0$1@cheetah.cadsoft.de...

Hello,

 

I have a board layout, and want to create a ASCII file that lists all the

net names and components that make up each net.

 

I have tried to Export a Netlist from the board, but only get the

following:

 

Netlist

Exported from 8051-3PORT.brd at  5/02/2008 10:21:39p

EAGLE Version 4.16r2 Copyright (c) 1988-2006 CadSoft

Net      Part     Pad

 

 

 

Thanks,

Greg