Hello fellow Eagle users,
I am working on some projects that require multiple logically
distinct netlists that actually connect on the board. The
simple, typical situation is "digital ground" and "analog ground",
which are to be connected at a single point to avoid ground
loops. This is often called a "star ground". There are more
general situations, where various subsections of the board
(one per ADC, for example) need separate ground polygons which are
connected to each other with a controlled layout on the board.
The issue is not limited to grounding. Kelvin circuits,
separated force/sense lines, and a variety of other real-life
circuitry call for logically distinct netlists that connect at
controlled points on the board.
At the moment, I am using Bert Menkveld's recent suggestion
of a library symbol with two pins and a device with two
superimposed pads. This works, with several drawbacks in the
board view. First, when preparing the board files for the
fabricator, the unwanted pads and drills have to be removed.
Second, there are lots of DRC complaints and one must be careful
not to ignore a real design rule violation in the noise of
"expected" complaints. Third, a device mandates a through-hole
or SMD pad, even when you only want to use an inner layer. This
places some modest restrictions on component layout.
So, I am looking for recommendations on the best techniques
in Eagle for handling "star grounds", Kelvin connections, and
so on. Currently using Eagle 4.16r2, and expect to upgrade
when our budget allows it.
Stu Friedberg
