OK. I'm routing my board and learning the ropes in this area.
My board is primarily SMD with a few 26 and 16 pin through hole shrouded headers. It appears that there is more than adequate room for traces given the components and connectors. I am allowing 4 layers for routing.
When I route the board with the auto-router, it routes much of the board and leaves me with the message "Polygons may have fallen apart." What is a likely cause and what might I do to minimize this occurrence? For the moment, I'd like to continue using the auto-router. I think it's more capable than me at laying out this many traces.
The polygons have the same outline covering the top and bottom layers. Both are GND. I can join the "islands" and further complete the routing by manually placing vias. Very few traces need to travel past 4 or more IC's.
Top layer traces are -
Layers 2 and 15 are *
Bottom traces are |
Routing grid 50.
DRU taken from Sunstone's website for 4 layer board manufacture.
Thoughts and advice are much appreciated.