so im trying to design a very simple OR gate safety, shown here (max amperage is 11)
but when i try to generate the board view all i get is this
so im trying to design a very simple OR gate safety, shown here (max amperage is 11)
but when i try to generate the board view all i get is this
nikita sim wrote:
so im trying to design a very simple OR gate safety, shown here (max
amperage is 11)
but when i try to generate the board view all i get is this
looks like the signals are not properly connected to the symbols.
try moving the symbols and look if the signals stay attached.
Maybe your symbols are not on grid?
besides that, your or gate is missing the power supply connections.
You most likely need to use the invoke command on that part.
Don't know what your Q1 & Q1 realy are. If they are not logic level
input power moduls but plain npn transistors, that circuit won't work.
--
Lorenz
On 12/06/14 07:52, Lorenz wrote:
looks like the signals are not properly connected to the symbols.
try moving the symbols and look if the signals stay attached.
Indeed - in fact :
if you look at the ugly diagonal wires to X3-1, X2-1, X2-2 it's quite
clear that they go to the middle of the symbol and not to the connection
point
the wire to X5-1 doesn't even reach it
the wires to the rest of X5 are to the middle, not the connection point
and so on
Did you use the "wire" tool (which is for drawing non-signal lines) to
make them, rather than the correct "net" tool?
thank you for the help my Q1 & Q1 are npn transistors i used them because i only want there to be a connection between x4-1,x5-1 and x4-4,x5-4 only when there is something going from the 22-23-2031s, if i can't use npn transistors what should i use. also how does one exactly invoke command?