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Thermal Via's

GP100


Hi


We are using Eagle version 5,11 and are designing a small switcher PSU that utilises the Texas TPS54340 Device. Farnell part No 2255010.


I have downloaded the cad soft package for this device but have the following query.


In the data sheet it has a typical layout for the device. It shows thermal vias underneath the package through the central GND connection Pad. These are then connected to the GND plane on the lower side of the board to enhance the thermal properties of the device.


Is there any way of generating these thermal vias through the Gnd pad on the symbol? Each way that I seem to try these it clears the GND plane beneath or has an overlap error in the DRC.

  • 0

    Am 01.08.2014 10:05, schrieb Gareth Pritchard:

     

    Hi

     

     

     

    We are using Eagle version 5,11 and are designing a small switcher PSU

    that utilises the Texas TPS54340 Device. Farnell part No 2255010.

     

     

    I have downloaded the cad soft package for this device but have the

    following query.

     

     

    In the data sheet it has a typical layout for the device. It shows

    thermal vias underneath the package through the central GND connection

    Pad. These are then connected to the GND plane on the lower side of the

    board to enhance the thermal properties of the device.

     

     

    Is there any way of generating these thermal vias through the Gnd pad on

    the symbol? Each way that I seem to try these it clears the GND plane

    beneath or has an overlap error in the DRC.

     

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    Please send me the board and the library.

     

     

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