I know that there's some ULPs to make this easier, but what about some better automatic panelizing features? Say I'm making a 7805 breakout. As part of the overall project I'll have the individual schematic file, a board file, and a panel file.
For the panel you could have settings for the array up and across, v-score or tab route, fiducials and size of sacrificial PCB on the edges for production. The main advantage to this would be to tweak the individual design and then it would cascade up to the panel without having to completely redo it for a small silk screen change. This could also greatly come in handy for a mixed design panel when ordering an array of prototypes.
I know that there's options and methods to achieve all of this elsewhere but I'm suggesting an integrated tool within eagle to do this.