I am looking for an Altera Max V package for eagle cad but the library doesn't seem to have one and I've had no luck on Altera's website. I would prefer not to build one - any ideas?
Regards, oldmanraskers.
I am looking for an Altera Max V package for eagle cad but the library doesn't seem to have one and I've had no luck on Altera's website. I would prefer not to build one - any ideas?
Regards, oldmanraskers.
I see you don't want to make your own package but I suggest you might want to re-consider.
I produce (low) tens of FPGA designs per year and make a new set of schematic symbols (not in Eagle) for nearly every design. This is so that the schematic can graphically represent the design intent with the connections from the FPGA to other parts nicely grouped together in a sensible order although the physical pins used on the FPGA will have been selected to achieve optimum pcb routing.
During the design process (circuit and pcb) the FPGA cad package gets modified many times - I'm not sure how friendly Eagle is for working in this way.
If you don't do this the schematic turns into a picture of a netlist which isn't any more informative than the netlist itself.
MK
I see you don't want to make your own package but I suggest you might want to re-consider.
I produce (low) tens of FPGA designs per year and make a new set of schematic symbols (not in Eagle) for nearly every design. This is so that the schematic can graphically represent the design intent with the connections from the FPGA to other parts nicely grouped together in a sensible order although the physical pins used on the FPGA will have been selected to achieve optimum pcb routing.
During the design process (circuit and pcb) the FPGA cad package gets modified many times - I'm not sure how friendly Eagle is for working in this way.
If you don't do this the schematic turns into a picture of a netlist which isn't any more informative than the netlist itself.
MK
I take your point about not obfuscating your schematic, I'm just surprised that the eagle cad library doesn't have them already.
What michaelkellett is implying that the logic of CPUD can vary according to what you use as well as how. So it would be better to show the intended design which may or may not include the CPUD elements.IMHO that is the better way.
Clem