Hi,
I'm putting together a component which is basically a set of contact
pads for an IC programmer -- it consists of two drill holes, and six
pads in this shape:
( )
( )
Pads are offset 0.05in, and placed on a 0.05in pitch. Drills are 0.8mm.
Each pad is 0.065 x 0.035 inches.
The idea is that during production, a set of test pins are pressed
against the board, the chip is programmed and a short Basic Assurance
Test is run on the core hardware. Once the bootloader is running, the
board is shuttled off to get the OS firmware and FPGA microcode
installed (which is done over USB). Nice idea, in theory at least.
There isn't any problem putting this together in the EAGLE library
editor -- in fact, it works quite well. However, if I place a ground
plane, the area around the VSS pad gets filled with copper. I'd rather
this not happen...
I tried adding a tRESTRICT polygon to the library component -- this
worked, but caused a ton of DRC errors: one for each pad, and one for
each track segment going to the SMD pads. Hardly ideal.
I also tried outlining the pads with a track on the tRESTRICT layer;
this didn't cause the DRC errors, but didn't completely stop the ground
plane entering the component (I got a pretty arrowhead next to the VSS
pad...)
I also tried the same thing with the tKEEPOUT layer -- this had no
effect whatsoever on the fills.
So what I want to know is: is there a way to do what I want (keep the
ground plane OUTSIDE the pad area while still allowing tracks inside)
without invoking the Wrath of the Holy DRC Check?
(Yes, I know I can just Approve the DRC errors, but I don't want to do
that unless it's absolutely 100% the ONLY way to do this -- approving
errors just seems like an awful hack to me)
Thanks,
Phil.
